Ppg Output Operations; Control Register Settings For Ppg Output Operation - NEC PD78076 User Manual

Pd78078 series; pd78078y series 8-bit single-chip microcontrollers
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8.5.3 PPG output operations

Setting the 16-bit timer mode control register (TMC0) and capture/compare control register 0 (CRC0) as shown
in Figure 8-16 allows operation as PPG (Programmable Pulse Generator) output.
In the PPG output operation, square waves are output from the TO0/P30 pin with the pulse width and the cycle
that correspond to the count values set beforehand in 16-bit capture/compare register 01 (CR01) and in 16-bit capture/
compare register 00 (CR00), respectively.
Figure 8-16. Control Register Settings for PPG Output Operation
TMC0
0
CRC0
0
TOC0
0
Caution Values in the following range should be set in CR00 and CR01.
0000H
CR01 < CR00
Remark x : Don't care
CHAPTER 8 16-BIT TIMER/EVENT COUNTER
(a) 16-bit timer mode control register (TMC0)
TMC03
TMC02
0
0
0
1
(b) Capture/compare control register 0 (CRC0)
CRC02
0
0
0
0
(c) 16-bit timer output control register (TOC0)
OSPT
OSPE
TOC04
LVS0
LVR0
0
0
1
0/1
0/1
FFFFH
TMC01
OVF0
1
0
0
Clear & start on match of TM0 and CR00
CRC01
CRC00
0
x
0
CR00 set as compare register
CR01 set as compare register
TOC01
TOE0
1
1
TO0 Output Enabled
Inversion of output on match of TM0 and CR00
Specified TO0 output F/F initial value
Inversion of output on match of TM0 and CR01
One-shot pulse output disabled
203

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