Timer Clock Select Register 6 Format - NEC PD78076 User Manual

(2) Timer clock select register 6 (TCL6)
This register sets count clocks of 8-bit timer register 6.
TCL6 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL6 to 00H.
Figure 10-4. Timer Clock Select Register 6 Format
Symbol 7 6 5
0 0 0
TCL6
TCL63 TCL62 TCL61 TCL60
0 0 0
0 0 0
0 1 0
0 1 0
0 1 1
0 1 1
1 0 0
1 0 0
1 0 1
1 0 1
1 1 0
1 1 0
1 1 1
1 1 1
Other than above
Note When clock is input from the external, timer output (PWM output) cannot be used.
Caution When rewriting TCL6 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
2. f
X
3. TI6
4. MCS : Bit 0 of oscillation mode selection register (OSMS)
5. Figures in parentheses apply to operation with f
CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 6
4 3 2 1
0 TCL63 TCL62 TCL61 TCL60
8-bit Timer Register 5 Count Clock Selection
MCS = 1
Note
0 TI6 falling edge
Note
1 TI6 rising edge
0 (Setting prohibited)
2f
XX
1 f f
(5.0 MHz)
XX X
0 f /2 f /2 (2.5 MHz)
XX X
2 2
1 f /2 f /2 (1.25 MHz)
XX X
3 3
0 f /2 f /2 (625 kHz)
XX X
4 4
f /2 f /2 (313 kHz)
1
XX X
5 5
f /2 f /2 (156 kHz)
0
XX X
6 6
1 f /2 f /2 (78.1 kHz)
XX X
7 7
0 f /2 f /2 (39.1 kHz)
XX X
8 8
f /2 f /2 (19.5 kHz)
1
XX X
9 9
0 f /2 f /2 (9.8 kHz)
XX X
11 11
1 f /2 f /2 (2.4 kHz)
XX X
Setting prohibited
: Main system clock frequency (f
: Main system clock oscillation frequency
: 8-bit timer register 6 input pin
Address After Reset
0
FF56H 00H
MCS = 0
f
X
f
X
f
X
f
X
f
X
f
X
f
X
f
X
f
X
f
X
f
X
f
X
or f /2)
X X
= 5.0 MHz.
X
R/W
R/W
(5.0 MHz)
/2 (2.5 MHz)
2
(1.25 MHz)
/2
3
(625 kHz)
/2
4
/2 (313 kHz)
5
(156 kHz)
/2
6
/2 (78.1 kHz)
7
(39.1 kHz)
/2
8
/2 (19.5 kHz)
9
(9.8 kHz)
/2
10
/2 (4.9 kHz)
11
/2 (1.2 kHz)
255