Oscillation Mode Selection Register Format; Main System Clock Waveform Due To Writing To Osms - NEC PD78076 User Manual

(2) Oscillation mode selection register (OSMS)
This register specifies whether the clock output from the main system clock oscillator without passing through
the scaler is used as the main system clock, or the clock output via the scaler is used as the main system
clock.
OSMS is set with 8-bit memory manipulation instruction.
RESET input sets OSMS to 00H.
Figure 7-4. Oscillation Mode Selection Register Format
Symbol 7 6
OSMS 0 0
Cautions 1. As shown in Figure 7-5 below, writing data (including same data as previous) to OSMS
cause delay of main system clock cycle up to 2/f
if this register is written during the operation, in peripheral hardware which operates with
the main system clock, a temporary error occurs in the count clock cycle of timer, etc.
In addition, because the oscillation mode is changed by this register, the clocks for
peripheral hardware as well as that for the CPU are switched.
Therefore, writing to OSMS should be performed only immediately after reset signal
release and before peripheral hardware operation starts.
2. When writing "1" to MCS, V
Figure 7-5. Main System Clock Waveform due to Writing to OSMS
f
XX
Remarks
170
CHAPTER 7 CLOCK GENERATOR
5 4 3 2
0 0 0 0
must be 2.7 V or higher before the write execution.
DD
Write to OSMS
(MCS 0)
Operating at f = f /2 (MCS = 0)
XX X
fxx : Main system clock frequency (fx or fx/2)
fx : Main system clock oscillation frequency
1 0 Address
0 MCS FFF2H
Main System Clock Scaler Control
MCS
0 Scaler used
1 Scaler not used
during the write operation. Therefore,
x
Max. 2/f
X
Operating at f
After
Reset R/W
00H W
= f /2 (MCS = 0)
XX X