(2) Watch timer mode control register (TMC2)
This register sets the watch timer operating mode, watch flag set time and prescaler interval time and
enables/disables prescaler and 5-bit counter operations.
manipulation instruction.
RESET input sets TMC2 to 00H.
Figure 11-3. Watch Timer Mode Control Register Format
7
6
5
Symbol
TMC2
0
TMC26
TMC25 TMC24
TMC20
Watch Operating Mode Selection
0
Normal operating mode (flag set at f
1
Fast feed operating mode (flag set at f
TMC21
Prescaler Operation Control
0
Clear after operation stop
1
Operation enable
TMC22
5-Bit Counter Operation Control
0
Clear after operation stop
1
Operation enable
Watch Flag Set Time Selection
TMC23
f
= 5.0 MHz Operation
XX
14
0
2
/f
(0.4 sec)
W
13
1
2
/f
(0.2 sec)
W
TMC26 TMC25 TMC24
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
Other than above
Caution When the watch timer is used, the prescaler should not be cleared frequently.
Remarks 1. f
: Watch timer clock frequency (f
W
2. f
: Main system clock frequency (f
XX
3. f
: Main system clock oscillation frequency
X
4. f
: Subsystem clock oscillation frequency
XT
CHAPTER 11 WATCH TIMER
4
3
2
1
0
TMC23
TMC22 TMC21 TMC20
14
/2
)
W
5
/2
)
W
f
= 4.19 MHz Operation
XX
14
2
/f
(0.5 sec)
W
13
2
/f
(0.25 sec)
W
Prescaler Interval Time Selection
f
= 5.0 MHz Operation
XX
4
µ
2
/f
(410 s)
W
5
µ
2
/f
(819 s)
W
6
2
/f
(1.64 ms)
W
7
2
/f
(3.28 ms)
W
8
2
/f
(6.55 ms)
W
9
2
/f
(13.1 ms)
W
Setting prohibited
TMC2 is set with a 1-bit or 8-bit memory
After
Address
Reset
FF4AH
00H
f
= 32.768 kHz Operation
XT
14
2
/f
13
2
/f
f
= 4.19 MHz Operation
XX
4
µ
2
/f
(488 s)
W
5
µ
2
/f
(977 s)
W
6
2
/f
(1.95 ms)
W
7
2
/f
(3.91 ms)
W
8
2
/f
(7.81 ms)
W
9
2
/f
(15.6 ms)
W
/2
7
or f
)
XX
XT
or f
/2)
X
X
R/W
R/W
(0.5 sec)
W
(0.25 sec)
W
f
= 32.768 kHz Operation
XT
4
µ
2
/f
(488 s)
W
5
µ
2
/f
(977 s)
W
6
2
/f
(1.95 ms)
W
7
2
/f
(3.91 ms)
W
8
2
/f
(7.81 ms)
W
9
2
/f
(15.6 ms)
W
273