Multiple Interrupt Example - NEC PD78076 User Manual

Pd78078 series; pd78078y series 8-bit single-chip microcontrollers
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Example 1. Two multiple interrupts generated
Main Processing
INTxx
(PR = 1)
During interrupt INTxx servicing, two interrupt requests, INTyy and INTzz are acknowledged, and
a multiple interrupt is generated.
acknowledge, and the interrupt request acknowledge enable state is set.
Example 2. Multiple interrupt is not generated by priority control
Main Processing
INTxx
(PR = 0)
1 Instruction
Execution
The interrupt request INTyy generated during interrupt INTxx servicing is not acknowledged
because the interrupt priority is lower than that of INTxx, and a multiple interrupt is not generated.
INTyy request is retained and acknowledged after execution of 1 instruction execution of the main
processing.
PR = 0 : Higher priority level
PR = 1 : Lower priority level
IE = 0 : Interrupt request acknowledge disable
520
CHAPTER 22 INTERRUPT FUNCTIONS
Figure 22-16. Multiple Interrupt Example (1/2)
INTxx
Servicing
IE = 0
EI
EI
INTyy
(PR = 0)
RETI
An EI instruction is issued before each interrupt request
INTxx
Servicing
EI
IE = 0
EI
INTyy
(PR = 1)
RETI
IE = 0
INTyy
Servicing
IE = 0
IE = 0
EI
INTzz
(PR = 0)
RETI
INTyy
Servicing
RETI
INTzz
Servicing
RETI

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