NEC PD78058FY(A) Manuals

Manuals and User Guides for NEC PD78058FY(A). We have 1 NEC PD78058FY(A) manual available for free PDF download: User Manual

NEC PD78058FY(A) User Manual (593 pages)

PD78058F Series; PD78058FY Series 8-Bit Single-Chip Microcontrollers

Brand: NEC | Category: Computer Hardware | Size: 3.24 MB

Table of Contents
15
Chapter 1 Outline ( Pd78058F Subseries)

35
- Features
  
  35
- Applications
  
  36
- Ordering Information
  
  36
- Quality Grade
  
  37
- Pin Configuration (Top View)
  
  38
- Series Expansion
  
  41
- Block Diagram
  
  43
- Outline of Function
  
  44
- Differences between the PD78058F and PD78058F(A)
  
  45
- Mask Options
  
  46
Chapter 2 Outline ( Pd78058Fy Subseries)

47
- Features
  
  47
- Applications
  
  48
- Ordering Information
  
  48
- Quality Grade
  
  49
- Pin Configuration (Top View)
  
  50
- Series Expansion
  
  53
- Block Diagram
  
  55
- Outline of Function
  
  56
- Differences between the PD78058FY and PD78058FY(A)
  
  57
  - Mask Options of Mask ROM Versions
    58
- Mask Options
  
  58
Chapter 3 Pin Function ( Pd78058F Subseries)

59
- Pin Function List
  
  59
  - Normal Operating Mode Pins
    59
  - PROM Programming Mode Pins (PROM Versions Only)
    64
- Description of Pin Functions
  
  65
  - P00 to P07 (Port 0)
    65
  - P10 to P17 (Port 1)
    66
  - P20 to P27 (Port 2)
    66
  - P30 to P37 (Port 3)
    67
  - P40 to P47 (Port 4)
    68
  - P50 to P57 (Port 5)
    68
  - P60 to P67 (Port 6)
    68
  - P70 to P72 (Port 7)
    69
  - P120 to P127 (Port 12)
    70
  - P130 and P131 (Port 13)
    70
  - Av Ref0
    70
  - Av Ref1
    70
  - Av DD
    71
  - Av Ss
    71
  - Reset
    71
  - X1 and X2
    71
  - XT1 and XT2
    71
  - VDD
    71
  - Vss
    71
  - PP (PROM Versions Only)
    71
  - IC (Mask ROM Version Only)
    72
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  73
  - Pin Input/Output Circuit Types
    73
  - List of Pin Input/Output Circuit
    75
Chapter 4 Pin Function ( Pd78058Fy Subseries)

77
- Pin Function List
  
  77
  - Normal Operating Mode Pins
    77
  - PROM Programming Mode Pins (PROM Versions Only)
    82
- Description of Pin Functions
  
  83
  - P00 to P07 (Port 0)
    83
  - P10 to P17 (Port 1)
    84
  - P20 to P27 (Port 2)
    84
  - P30 to P37 (Port 3)
    85
  - P40 to P47 (Port 4)
    86
  - P50 to P57 (Port 5)
    86
  - P60 to P67 (Port 6)
    86
  - P70 to P72 (Port 7)
    87
  - P120 to P127 (Port 12)
    88
  - P130 and P131 (Port 13)
    88
  - Av Ref0
    88
  - Av Ref1
    88
  - Av DD
    89
  - Av Ss
    89
  - Reset
    89
  - X1 and X2
    89
  - XT1 and XT2
    89
  - VDD
    89
  - Vss
    89
  - PP (PROM Versions Only)
    89
  - IC (Mask ROM Version Only)
    90
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  91
  - Pin Input/Output Circuit Types
    91
  - List of Pin Input/Output Circuit
    93
Chapter 5 Cpu Architecture

95
- Memory Spaces
  
  95
- Processor Registers
  
  103
  - Control Registers
    103
  - Program Counter Format
    103
  - Program Status Word Format
    103
  - Data to be Reset from Stack Memory
    105
    
    General Registers
    106
  - Data to be Saved to Stack Memory
    105
  - Stack Pointer Format
    105
  - General Register Configuration
    107
    
    Special Function Register (SFR)
    108
  - Special-Function Register List
    109
- Instruction Address Addressing
  
  112
  - Relative Addressing
    112
  - Immediate Addressing
    113
  - Table Indirect Addressing
    114
  - Register Addressing
    115
- Operand Address Addressing
  
  116
  - Implied Addressing
    116
  - Register Addressing
    117
  - Direct Addressing
    118
  - Short Direct Addressing
    119
  - Special-Function Register (SFR) Addressing
    121
  - Register Indirect Addressing
    122
  - Based Addressing
    123
  - Based Indexed Addressing
    124
  - Stack Addressing
    124
Chapter 6 Port Functions

125
- Port Functions
  125
- Port Types
  125
- Port Functions ( PD78058F Subseries)
  126
- Port Functions ( PD78058FY Subseries)
  128
- Port Configuration
  
  130
  - Port 0
    130
  - P00 and P07 Block Diagram
    131
  - P01 to P06 Block Diagram
    131
    
    Port 1
    132
  - P10 to P17 Block Diagram
    132
    
    Port 2 ( PD78058F Subseries)
    133
  - P20, P21, P23 to P26 Block Diagram
    133
  - P22 and P27 Block Diagram
    134
    
    Port 2 ( PD78058FY Subseries)
    135
  - P20, P21, P23 to P26 Block Diagram
    135
  - P22 and P27 Block Diagram
    136
    
    Port 3
    137
  - P30 to P37 Block Diagram
    137
    
    Port 4
    138
  - Block Diagram of Falling Edge Detection Circuit
    138
    
    Port 5
    139
  - P40 to P47 Block Diagram
    138
  - P50 to P57 Block Diagram
    139
    
    Port 6
    140
  - P60 to P63 Block Diagram
    141
  - P64 to P67 Block Diagram
    141
    
    Port 7
    142
  - P70 Block Diagram
    142
  - P71 and P72 Block Diagram
    143
    
    Port 12
    144
  - P120 to P127 Block Diagram
    144
    
    Port 13
    145
  - P130 and P131 Block Diagram
    145
- Port Function Control Registers
  
  146
- Port Function Operations
  
  152
- Selection of Mask Option
  
  153
Chapter 7 Clock Generator

155
Chapter 8 16-Bit Timer/Event Counter

171
Chapter 9 8-Bit Timer/Event Counters

211
Chapter 10 Watch Timer

239
- Watch Timer Functions
  
  239
  - Interval Timer Interval Time
    239
- Watch Timer Configuration
  
  240
- Watch Timer Control Registers
  
  240
- Watch Timer Operations
  
  244
  - Watch Timer Operation
    244
  - Interval Timer Operation
    244
  - Interval Timer Interval Time
    244
Chapter 11 Watchdog Timer

245
- Watchdog Timer Functions
  
  245
  - Watchdog Timer Runaway Detection Times
    245
  - Interval Times
    246
- Watchdog Timer Configuration
  
  247
  - Watchdog Timer Block Diagram
    247
- Watchdog Timer Control Registers
  
  248
  - Timer Clock Select Register 2 Format
    249
  - Watchdog Timer Mode Register Format
    250
- Watchdog Timer Operations
  
  251
  - Watchdog Timer Operation
    251
  - Watchdog Timer Runaway Detection Time
    251
    
    Interval Timer Operation
    252
    
    Interval Timer Interval Time
    252
Chapter 12 Clock Output Control Circuit

253
Chapter 13 Buzzer Output Control Circuit

257
Chapter 14 A/D Converter

261
Chapter 15 D/A Converter

279
- D/A Converter Functions
  
  279
- D/A Converter Configuration
  
  280
  - D/A Converter Block Diagram
    280
- D/A Converter Control Registers
  
  282
  - D/A Converter Mode Register Format
    282
- Operations of D/A Converter
  
  283
- Cautions Related to D/A Converter
  
  284
  - Use Example of Buffer Amplifier
    284
Chapter 16 Serial Interface Channel 0 ( Pd78058F Subseries)

285
- Differences Among Channels 0, 1, and 2
  285
- Serial Interface Channel 0 Functions
  
  286
  - Serial Bus Interface (SBI) System Configuration Example
    287
- Serial Interface Channel 0 Configuration
  
  288
  - Serial Interface Channel 0 Block Diagram
    289
- Serial Interface Channel 0 Control Registers
  
  292
- Serial Interface Channel 0 Operations
  
  299
  - Operation Stop Mode
    299
  - 3-Wire Serial I/O Mode Operation
    300
    
    Wire Serial I/O Mode Timings
    303
    
    RELT and CMDT Operations
    303
    
    Circuit of Switching in Transfer Bit Order
    304
  - SBI Mode Operation
    305
  - Example of Serial Bus Configuration with SBI
    305
  - SBI Transfer Timings
    307
  - Bus Release Signal
    308
  - Command Signal
    308
  - Addresses
    309
  - Slave Selection with Address
    309
  - Commands
    310
  - Data
    310
  - Acknowledge Signal
    311
  - BUSY and READY Signals
    312
  - RELT and CMDD Operations (Slave)
    317
  - RELT, CMDT, RELD, and CMDD Operations (Master)
    317
  - ACKT Operation
    318
  - ACKE Operations
    319
  - ACKD Operations
    320
  - BSYE Operation
    320
  - Various Signals in SBI Mode
    321
    
    Pin Configuration
    323
    
    Address Transmission from Master Device to Slave Device (WUP = 1)
    325
  - Command Transmission from Master Device to Slave Device
    326
  - Data Transmission from Master Device to Slave Device
    327
  - Data Transmission from Slave Device to Master Device
    328
    
    2-Wire Serial I/O Mode Operation
    331
  - Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    331
  - Wire Serial I/O Mode Timings
    334
  - RELT and CMDT Operations
    335
    
    SCK0/P27 Pin Output Manipulation
    336
    
    SCK0/P27 Pin Configuration
    336
Chapter 17 Serial Interface Channel 0 ( Pd78058Fy Subseries)

337
- Differences Among Channels 0, 1, and 2
  337
- Serial Interface Channel 0 Functions
  
  338
- Serial Interface Channel 0 Configuration
  
  340
  - Serial Interface Channel 0 Block Diagram
    341
  - Serial Interface Channel 0 Interrupt Request Signal Generation
    344
- Serial Interface Channel 0 Control Registers
  
  345
- Serial Interface Channel 0 Operations
  
  353
  - Operation Stop Mode
    353
  - 3-Wire Serial I/O Mode Operation
    354
  - RELT and CMDT Operations
    356
  - Wire Serial I/O Mode Timings
    356
  - Circuit of Switching in Transfer Bit Order
    357
    
    2-Wire Serial I/O Mode Operation
    358
  - Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    358
  - Wire Serial I/O Mode Timings
    361
  - RELT and CMDT Operations
    362
    
    I 2 C Bus Mode Operation
    363
  - Address
    365
  - Start Condition
    365
  - Transfer Direction Specification
    365
  - Acknowledge Signal
    366
  - Stop Condition
    366
  - Wait Signal
    367
  - Pin Configuration
    372
  - Data Transmission from Master to Slave (both Master and Slave Selected 9-Clock Wait)
    375
  - Data Transmission from Slave to Master (both Master and Slave Selected 9-Clock Wait)
    377
    
    Cautions on Use of I C Bus Mode
    380
  - Start Condition Output
    380
  - Slave Wait Release (Transmission)
    381
  - Slave Wait Release (Reception)
    382
    
    Restrictions in I 2 C Bus Mode
    383
    
    SCK0/SCL/P27 Pin Output Manipulation
    385
    
    SCK0/SCL/P27 Pin Configuration
    385
  - Logic Circuit of SCL Signal
    386
Chapter 18 Serial Interface Channel 1

387
Chapter 19 Serial Interface Channel 2

433
Chapter 20 Real-Time Output Port

471
Chapter 21 Interrupt and Test Functions

477
Chapter 22 External Device Expansion Function

505
Chapter 23 Standby Function

515
- Standby Function and Configuration
  
  515
- Standby Function Operations
  
  517
  - HALT Mode
    517
  - HALT Mode Operating Status
    517
  - HALT Mode Clear Upon Interrupt Request Generation
    518
  - HALT Mode Release by RESET Input
    519
  - Operation after HALT Mode Release
    519
    
    STOP Mode
    520
    
    STOP Mode Operating Status
    520
  - STOP Mode Release by Interrupt Request Generation
    521
  - Operation after STOP Mode Release
    522
  - Release by STOP Mode RESET Input
    522
Chapter 24 Reset Function

523
Chapter 25 Rom Correction

527
- ROM Correction Functions
  
  527
- ROM Correction Configuration
  
  527
  - Block Diagram of ROM Correction
    527
  - Correction Address Registers 0 and 1 Format
    528
- ROM Correction Control Registers
  
  529
  - Correction Control Register Format
    529
- ROM Correction Application
  
  530
- ROM Correction Example
  
  533
- Program Execution Flow
  
  534
  - Program Transition Diagram (When One Place Is Corrected)
    534
  - Program Transition Diagram (When Two Places Are Corrected)
    535
- Cautions on ROM Correction
  
  536
Chapter 26 Pd78P058F, 78P058Fy

537
- Differences between PD78P058F, 78P058FY and Mask ROM Versions
  537
- Memory Size Switching Register
  
  538
  - Memory Size Switching Register Format
    538
- Internal Expansion RAM Size Switching Register
  
  539
  - Value Set to the Internal Expansion RAM Size Switching Register
    539
- PROM Programming
  
  540
  - Operating Modes
    540
  - PROM Write Procedure
    542
  - Page Program Mode Flowchart
    542
  - Page Program Mode Timing
    543
  - Byte Program Mode Flowchart
    544
  - Byte Program Mode Timing
    545
    
    PROM Read Procedure
    546
  - PROM Read Timing
    546
- Screening of One-Time PROM Versions
  
  547
Chapter 27 Instruction Set

549
- Legends Used in Operation List
  
  550
- Operation List
  
  552
- Instructions Listed by Addressing Type
  
  560
Appendix A Differences Among Pd78054, 78058F, and 780058 Subseries

565
APPENDIX A DIFFERENCES AMONG Μpd78054, 78058F, and 780058 SUBSERIES

567
Appendix B Development Tools

567
- B-1 Development Tool Configuration
  568
- Language Processing Software
  
  570
- PROM Programming Tool
  
  571
  - Hardware
    571
  - Software
    571
- Debugging Tool
  
  572
  - Hardware
    572
  - Software
    574
- OS for IBM PC
  
  576
- Upgrading Former In-Circuit Emulators for 78K/0 Series to IE-78001-R-A
  
  576
Appendix C Embedded Software

581
- Real-Time os
  
  582
Appendix D Register Index

585
- Register Index
  
  585
Appendix E Revision History

591

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NEC PD78058FY(A) Manuals

NEC PD78058FY(A) User Manual (593 pages)

Table of Contents

Chapter 1 Outline ( Pd78058F Subseries)

Features

Applications

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Differences between the PD78058F and PD78058F(A)

Mask Options

Chapter 2 Outline ( Pd78058Fy Subseries)

Features

Applications

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Differences between the PD78058FY and PD78058FY(A)

Mask Options

Chapter 3 Pin Function ( Pd78058F Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

Chapter 4 Pin Function ( Pd78058Fy Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

Chapter 5 Cpu Architecture

Memory Spaces

Processor Registers

Instruction Address Addressing

Operand Address Addressing

Chapter 6 Port Functions

Port Configuration

Port Function Control Registers

Port Function Operations

Selection of Mask Option

Chapter 7 Clock Generator

Clock Generator Functions

Clock Generator Configuration

Clock Generator Control Register

System Clock Oscillator

Clock Generator Operations

Changing System Clock and CPU Clock Settings

Chapter 8 16-Bit Timer/Event Counter

Overview of the PD78058F and 78058FY Subseries On-Chip Timers

16-Bit Timer/Event Counter Functions

16-Bit Timer/Event Counter Configuration

16-Bit Timer/Event Counter Control Registers

16-Bit Timer/Event Counter Operations

16-Bit Timer/Event Counter Operating Precautions

Chapter 9 8-Bit Timer/Event Counters

8-Bit Timer/Event Counter Function

8-Bit Timer/Event Counter Configuration

8-Bit Timer/Event Counter Control Registers

8-Bit Timer/Event Counter Operation

Cautions on 8-Bit Timer/Event Counters

Chapter 10 Watch Timer

Watch Timer Functions

Watch Timer Configuration

Watch Timer Control Registers

Watch Timer Operations

Chapter 11 Watchdog Timer

Watchdog Timer Functions

Watchdog Timer Configuration

Watchdog Timer Control Registers

Watchdog Timer Operations

Chapter 12 Clock Output Control Circuit

Clock Output Control Circuit Functions

Clock Output Control Circuit Configuration

Clock Output Function Control Registers

Chapter 13 Buzzer Output Control Circuit

Buzzer Output Control Circuit Functions

Buzzer Output Control Circuit Configuration