Bus Integrity Test - Fujitsu FX-3001SR User Manual

After the test is finished, disconnect the loop back cable from the local console and
reconnect the terminal. Press any key on the target port terminal. The UART test
menu screen will be displayed on the local console screen.
Error messages
If the sent data and received data do not match
error @ 71,431 byte
(0x07 -> 0xFF)
UART1 USR1=0x00006450 USR2=0x00009080 <- Displays status registers 1 and 2 of UART1
UART2 USR1=0x00002050 USR2=0x00004088 <- Displays status registers 1 and 2 of UART2
If a timeout error (10 seconds) occurs when sending or receiving data
Rx timeout @ 0 byte
(0x00 -> )
UART1 USR1=0x00006450 USR2=0x00009080 <- Displays status registers 1 and 2 of UART1
UART2 USR1=0x00002050 USR2=0x00004088 <- Displays status registers 1 and 2 of UART2
7
7.2.1.6.2
This is a test designed to induce a bit error by continuously sending a large amount
of data for 0xAA, 0x55, 0x00, and 0xFF.
The input format and procedures are the same as those for the data compare test.
Example
Local Console? [Y/N, N:Target Port] > N
continuous? [Y/N] > Y
connect Loop back cable. then hit any key
running [cont,2,465kB]
abort @ 2,524,989 byte
hit any key
Error messages
Same as the data compare test.
SERVIS IP-Serial
178
1p Converter
User's Guide
<- Displays the processed byte count
<- Sent and received data
<- Displays the processed byte count
<- Sent and received data

bus integrity test

Enter
Enter