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SECTION 2
SIGNAL DESCRIPTIONS
This section contains brief descriptions of the MC68340 input and output signals in their
functional groups as shown in Figure 2-1.
A31/PORT A7/IACK7
A30/PORT A6/IACK6
A29/PORT A5/IACK5
A28/PORT A4/IACK4
A27/PORT A3/IACK3
A26/PORT A2/IACK2
A25/PORT A1/IACK1
A24/PORT A0
A23–A0
D15–D0
FC3–FC0
RESET
BERR
EXTERNAL
HALT
AS
INTERFACE
DS
R/W
SIZ1
SIZ0
DSACK1
DSACK0
BR
BG
BGACK
ARBITRATION
RMC
IRQ7/PORT B7
IRQ6/PORT B6
IRQ5/PORT B5
IRQ3/PORT B3
CS3/IRQ4/PORT B4
CS2/IRQ2/PORT B2
CS1/IRQ1/PORT B1
CS0/AVEC
MODCK/PORT B0
MOTOROLA
Freescale Semiconductor, Inc.
PORT A
TEST
BUS
SYSTEM
INTEGRATION
MODULE
BUS
CLOCK
TWO-CHANNEL
PORT B
Figure 2-1. Functional Signal Groups
MC68340 USER'S MANUAL
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Go to: www.freescale.com
TWO-CHANNEL
CPU32
SERIAL
CORE
I/O
OUTPUT
PORT
IMB
TIMER
TIMER
DMA
MODULE
MODULE
CONTROLLER
RxDA
TxDA
CTSA
RxDB
TxDB
CTSB
TxRDYA/OP6
RxRDYA/FFULLA/OP4
RTSB/OP1
RTSA/OP0
2- 1
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