Chip Select Operation - Motorola MC68340 User Manual

Integrated processor with dma
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Table 4-2. System Frequencies from 32.768-kHz Reference
Y
000000
000101
001010
001111
010100
011001
011111
100011
101000
101101
110010
110111
111100
111111
NOTE: System frequencies are in kHz.
4.2.3.3 CLOCK CONTROL. The clock control circuits determine the source used for both
internal and external clocks during special circumstances, such as low-power stop
(LPSTOP) execution.
Table 4-3 summarizes the clock activity during LPSTOP in crystal mode operation. Any
clock in the off state is held low. The STEXT and STSIM bits in the SYNCR control clock
activity during LPSTOP. Refer to 4.2.6 Low-Power Stop for additional information.

4.2.4 Chip Select Operation

Typical microprocessor systems require external hardware to provide select signals to
external memory and peripherals. The MC68340 integrates these functions on chip to
provide the cost, speed, and reliability benefits of a higher level of integration. The chip
select function contains register pairs for each external chip select signal. The pair
consists of a base address register and an address mask register that define the
characteristics of a single chip select. The register pair provides flexibility for a wide
variety of chip select functions.
MOTOROLA
Freescale Semiconductor, Inc.
W = 0; X = 0
W = 0; X = 1
131
262
786
1573
1442
2884
2097
4194
2753
5505
3408
6816
4194
8389
4719
9437
5374
10748
6029
12059
6685
13369
7340
14680
7995
15991
8389
16777
Table 4-3. Clock Control Signals
Control Bits
STSIM
STEXT
0
0
0
1
1
0
1
1
NOTE: SIMCLK runs the periodic interrupt RESET and
IRQ pin synchronizers in LPSTOP mode.
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
W = 1; X = 0
524
3146
5767
8389
11010
13631
16777
18874
21496
24117
Clock Outputs
SIMCLK
CLKOUT
EXTAL
Off
EXTAL
EXTAL
VCO
Off
VCO
VCO
W = 1; X = 1
1049
6291
11534
16777
22020
4- 13

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