Table of Contents
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11/2/95
TABLE OF CONTENTS (Continued)
Paragraph
Number
5.1.4
Vector Base Register.................................................................................... 5-4
5.1.5
Exception Handling...................................................................................... 5-4
5.1.6
Addressing Modes........................................................................................ 5-5
5.1.7
Instruction Set................................................................................................ 5-5
5.1.7.1
Table Lookup and Interpolate Instructions........................................... 5-7
5.1.7.2
Low-Power STOP Instruction ................................................................. 5-7
5.1.8
Processing States......................................................................................... 5-7
5.1.9
Privilege States............................................................................................. 5-7
5.2
Architecture Summary ..................................................................................... 5-8
5.2.1
Programming Model..................................................................................... 5-8
5.2.2
Registers......................................................................................................... 5-10
5.3
Instruction Set.................................................................................................... 5-11
5.3.1
M68000 Family Compatibility..................................................................... 5-11
5.3.1.1
New Instructions........................................................................................ 5-11
5.3.1.1.1
Low-Power Stop (LPSTOP)................................................................ 5-11
5.3.1.1.2
Table Lookup and Interpolation (TBL).............................................. 5-12
5.3.1.2
Unimplemented Instructions................................................................... 5-12
5.3.2
Instruction Format and Notation................................................................. 5-12
5.3.3
Instruction Summary .................................................................................... 5-15
5.3.3.1
Condition Code Register......................................................................... 5-20
5.3.3.2
Data Movement Instructions ................................................................... 5-21
5.3.3.3
Integer Arithmetic Operations................................................................. 5-22
5.3.3.4
Logic Instructions...................................................................................... 5-24
5.3.3.5
Shift and Rotate Instructions................................................................... 5-24
5.3.3.6
Bit Manipulation Instructions................................................................... 5-25
5.3.3.7
Binary-Coded Decimal (BCD) Instructions .......................................... 5-26
5.3.3.8
Program Control Instructions.................................................................. 5-26
5.3.3.9
System Control Instructions.................................................................... 5-27
5.3.3.10
Condition Tests ......................................................................................... 5-29
5.3.4
Using the TBL Instructions .......................................................................... 5-29
5.3.4.1
Table Example 1: Standard Usage....................................................... 5-30
5.3.4.2
Table Example 2: Compressed Table .................................................. 5-31
5.3.4.3
Table Example 3: 8-Bit Independent Variable .................................... 5-32
5.3.4.4
Table Example 4: Maintaining Precision.............................................. 5-34
5.3.4.5
Table Example 5: Surface Interpolations............................................. 5-36
5.3.5
Nested Subroutine Calls............................................................................. 5-36
5.3.6
Pipeline Synchronization with the NOP Instruction................................ 5-36
5.4
Processing States............................................................................................. 5-36
5.4.1
State Transitions........................................................................................... 5-37
5.4.2
Privilege Levels............................................................................................. 5-37
5.4.2.1
Supervisor Privilege Level...................................................................... 5-37
5.4.2.2
User Privilege Level................................................................................. 5-39
viii
Freescale Semiconductor, Inc.
SECTION 1: OVERVIEW
Title
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
UM Rev.1.0
P a g e
Number
MOTOROLA
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