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EXG
MOVEC
MOVEC
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVEM.W
MOVEM.W
MOVEM.L
MOVEM.L
MOVEP.W
MOVEP.W
MOVEP.L
MOVEP.L
MOVES (Save)
MOVES (Op)
MOVES (Save)
MOVES (Op)
MOVE
MOVE
SWAP
X
There is one bus cycle for byte and word operands and two bus cycles for long
operands. For long bus cycles, add two clocks to the tail and to the number of
cycles.
Each bus cycle may take up to four clocks without increasing total execution time.
Cr
Control registers USP, VBR, SFC, and DFC
n
Number of registers to transfer
RL
Register List
Maximum time (certain data or mode combinations may execute faster).
NOTE: The MOVES instruction has an additional save step which other instructions do not
have. To calculate the total instruction time, calculate the save, the EA, and the
operation execution times, and combine in the order listed, using the equations
given in 5.7.1.6 Instruction Execution Time Calculation.
5.7.3.5 ARITHMETIC/LOGIC INSTRUCTIONS. The arithmetic/logic instruction table
indicates the number of clock periods needed to perform the specified arithmetic/logical
instruction using the specified addressing mode. Footnotes indicate when to account for
the appropriate EA times. The total number of clock cycles is outside the parentheses.
5-102
Freescale Semiconductor, Inc.
Instruction
Rn, Rm
Cr, Rn
Rn, Cr
CCR, Dn
CCR, CEA
Dn, CCR
FEA , CCR
SR, Dn
SR, CEA
Dn, SR
FEA , SR
CEA , RL
RL, CEA
CEA , RL
RL, CEA
Dn, (d
, An)
16
(d
, An), Dn
16
Dn, (d
, An)
16
(d
, An), Dn
16
CEA , Rn
CEA , Rn
Rn, CEA
Rn, CEA
USP, An
An, USP
Dn
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Head
Tail
2
0
10
0
12
0
14-16(0/1/0)
2
0
0
2
2
0
0
0
2
0
0
2
4
2
0
2
1
0
8
n
1
0
8
n
1
0
12
n
1
2
10 n
2
0
1
2
2
0
1
2
1
1
7
1
1
1
9
2
0
0
0
0
4
0
Cycles
4(0/1/0)
14(0/2/0)
4(0/1/0)
4(0/1/1)
4(0/1/0)
4(0/1/0)
4(0/1/0)
4(0/1/1)
10(0/3/0)
10(0/3/0)
4 (n
1, 2, 0)
4 (0, 2, n)
4(2n
2, 2, 0)
4 (0, 2, 2n)
10(0/2/2)
11(2/2/0)
14(0/2/4)
19(4/2/0)
3(0/1/0)
11(X/1/0)
3(0/1/0)
12(0/1/X)
2(0/1/0)
2(0/1/0)
6(0/1/0)
MOTOROLA
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