1 – EXTEST
0 – OTHERWISE
G1
DATA FROM
SYSTEM
1
LOGIC
MUX
1
1 – EXTEST
0 – OTHERWISE
G1
1
MUX
1
MOTOROLA
Freescale Semiconductor, Inc.
SHIFT DR
G1
1
MUX
1
FROM
CLOCK DR
LAST
CELL
Figure 9-3. Output Latch Cell (O.Latch)
TO NEXT
CELL
1D
1D
C1
C1
UPDATE DR
Figure 9-4. Input Pin Cell (I.Pin)
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
TO NEXT
CELL
1 D
1 D
C1
C1
UPDATE DR
G1
1
MUX
1
CLOCK DR
FROM LAST
CELL
TO OUTPUT
BUFFER
INPUT
PIN
SHIFT DR
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