Serial Module Programming Model; Module Configuration Register (Mcr) - Motorola MC68340 User Manual

Integrated processor with dma
Hide thumbs Also See for MC68340:
Table of Contents

Advertisement

Address
FC
S 1
700
701
S
702
S
703
S
704
S
705
S
S/U 2
710
711
S/U
712
S/U
713
S/U
714
S/U
INPUT PORT CHANGE REGISTER (IPCR)
715
S/U
INTERRUPT STATUS REGISTER (ISR)
716
S/U
717
S/U
718
S/U
719
S/U
71A
S/U
71B
S/U
71C
S/U
71D
S/U
71E
S/U
71F
S/U
720
S/U
721
S/U
NOTES:
1. S = Register permanently defined as supervisor-only access
2. S/U = Register programmable as either supervisor or user access
3. A read or write to these locations currently has no effect.
4. Address-triggered commands
Figure 7-9. Serial Module Programming Model
7.4.1.1 MODULE CONFIGURATION REGISTER (MCR). The MCR controls the serial
module configuration. This register can be either read or written when the module is
enabled and is in the supervisor state. The MCR is not affected by a CPU32 RESET
instruction. Only the MCR can be accessed when the module is disabled (i.e., the STP bit
in the MCR is set).
MCR
15
14
13
12
STP
FRZ1
FRZ0
ICCS
RESET:
0
0
0
0
Read/Write
MOTOROLA
Freescale Semiconductor, Inc.
Register Read (R/W = 1)
MCR (HIGH BYTE)
MCR (LOW BYTE)
DO NOT ACCESS 3
DO NOT ACCESS 3
INTERRUPT LEVEL (ILR)
INTERRUPT VECTOR (IVR)
MODE REGISTER 1A (MR1A)
STATUS REGISTER A (SRA)
DO NOT ACCESS 3
RECEIVER BUFFER A (RBA)
DO NOT ACCESS 3
DO NOT ACCESS 3
MODE REGISTER 1B (MR1B)
STATUS REGISTER B (SRB)
DO NOT ACCESS 3
RECEIVER BUFFER B (RBB)
DO NOT ACCESS 3
INPUT PORT REGISTER (IP)
DO NOT ACCESS 3
DO NOT ACCESS 3
MODE REGISTER 2A (MR2A)
MODE REGISTER 2B (MR2B)
11
10
9
8
0
0
0
0
0
0
0
0
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Register Write (R/W = 0)
MCR (HIGH BYTE)
MCR (LOW BYTE)
DO NOT ACCESS 3
DO NOT ACCESS 3
NTERRUPT LEVEL (ILR)
INTERRUPT VECTOR (IVR)
MODE REGISTER 1A (MR1A)
CLOCK-SELECT REGISTER A (CSRA)
COMMAND REGISTER A (CRA)
TRANSMITTER BUFFER A (TBA)
AUXILIARY CONTROL REGISTER (ACR)
INTERRUPT ENABLE REGISTER (IER)
DO NOT ACCESS 3
DO NOT ACCESS 3
MODE REGISTER 1B (MR1B)
CLOCK-SELECT REGISTER B (CSRB)
COMMAND REGISTER B (CRB)
TRANSMITTER BUFFER B (TBB)
DO NOT ACCESS 3
OUTPUT PORT CONTROL REGISTER (OPCR)
OUTPUT PORT (OP) 4 BIT SET
OUTPUT PORT (OP) 4 BIT RESET
MODE REGISTER 2A (MR2A)
MODE REGISTER 2B (MR2B)
7
6
5
4
SUPV
0
0
0
1
0
0
0
$700
3
2
1
0
IARB
0
0
0
0
Supervisor Only
7- 19

Advertisement

Table of Contents
loading

Table of Contents