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6.7.5 Function Code Register (FCR)
The FCR contains the source and destination function codes for the channel. This register
is accessible in either supervisor or user space. The FCR can always be read or written to
when the DMA module is enabled (i.e., the STP bit in the MCR is cleared).
SFC—Source Function Code Field
This field can be used to specify the source access to a certain address space type.
The source function code bits are defined in Table 6-6.
DFC—Destination Function Code Field
This field can be used to specify the destination access to a certain address space type.
The destination function code bits are defined in Table 6-6.
Although FC3 can be set for DMA transfers to distinguish the
source or destination space from other data or program
spaces, it is not required to be set. Since the CPU32 currently
has only 3-bit SFC and DFC capability, it cannot emulate
FC3 = 1 at this time. However, it is recommended that FC3 be
set to one to distinguish DMA or CPU access during debug.
6-32
Freescale Semiconductor, Inc.
FCR1, FCR2
7
6
5
4
SFC
RESET:
U
U
U
U
U = Unaffected by reset.
Table 6-6. Address Space Encoding
Function Code Bits
3
2
1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
x
x
NOTE
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3
2
1
0
DFC
U
U
U
U
Supervisor/User
0
Address Spaces
0
Reserved (Motorola)
1
User Data Space
0
User Program Space
1
Reserved (User)
0
Reserved (Motorola)
1
Supervisor Data Space
0
Supervisor Program
Space
1
CPU Space
x
DMA Space
MOTOROLA
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