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DSIZE—Destination Size Control Field
This field controls the size of the destination (write) bus cycle that the DMA channel is
running. Table 6-3 defines these bits.
REQ—Request Generation Field
This field controls the mode of operation the DMA channel uses to make an operand
transfer request. Table 6-4 defines these bits.
BB—Bus Bandwidth Field
This field controls the percentage of 1024 clock periods of the IMB that the DMA
channel can use during internal requests only. Table 6-5 defines these bits.
REQ Field
Bit 5
0
0
0
0
MOTOROLA
Freescale Semiconductor, Inc.
Table 6-3. DSIZEx Encoding
Bit 7
Bit 6
0
0
0
1
1
0
1
1
*External logic is required to complete a long-
word transfer.
Table 6-4. REQx Encoding
Bit 5
Bit 4
0
0
Internal Request at Programmable Rate
0
1
Reserved
1
0
External Request Burst Transfer Mode
1
1
External Request Cycle Steal
Table 6-5. BBx Encoding and Bus Bandwidth
BB Field
Bit 4
Bit 3
Bit 2
0
0
0
0
0
1
0
1
0
0
1
1
MC68340 USER'S MANUAL
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Definition
Long Word*
Byte
Word
Not Used
Definition
Bus Bandwidth
Definition
(Clock Periods)
25%
256
50%
512
75%
768
100%
1024
6- 29
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