Data Movement Instructions - Motorola MC68340 User Manual

Integrated processor with dma
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Table 5-3. Condition Code Computations (Continued)
Operations
ROR
ROR (r = 0)
NOTE : The following notations apply to this table only.
— =
Not affected
U
=
Undefined
?
=
See special definition
=
General case
X
=
C
N
=
Rm
Z
=
Rm
...
Boolean AND
V
=
Boolean OR
5.3.3.2 DATA MOVEMENT INSTRUCTIONS. The MOVE instruction is the basic means of
transferring and storing address and data. MOVE instructions transfer byte, word, and
long-word operands from memory to memory, memory to register, register to memory,
and register to register. Address movement instructions (MOVE or MOVEA) transfer word
and long-word operands and ensure that only valid address manipulations are executed.
In addition to the general MOVE instructions, there are several special data movement
instructions—move multiple registers (MOVEM), move peripheral data (MOVEP), move
quick (MOVEQ), exchange registers (EXG), load effective address (LEA), push effective
address (PEA), link stack (LINK), and unlink stack (UNLK). Table 5-4 is a summary of the
data movement operations.
Instruction
EXG
LEA
LINK
MOVE
MOVEA
MOVEM
MOVEP
Dn, (d 16 , An)
(d 16 , An), Dn
MOVEQ
# data Dn
PEA
UNLK
MOTOROLA
Freescale Semiconductor, Inc.
X
N
Z
V
0
0
R0
Table 5-4. Data Movement Operations
Operand
Syntax
Operand Size
Rn, Rn
32
ea , An
32
An, # d
16, 32
ea , ea
8, 16, 32
ea , An
16, 32
32
list, ea
16, 32
ea , list
16, 32
32
16, 32
8
32
ea
32
An
32
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C
Special Definition
?
C = Dr – 1
0
Sm
=
Source operand MSB
Dm
=
Destination operand MSB
Rm
=
Result operand MSB
R
=
Register tested
n
=
Bit Number
r
=
Shift count
LB
=
Lower bound
UB
=
Upper bound
Rm
=
NOT Rm
Operation
Rn
Rn
ea
An
SP – 4
SP, An
(SP); SP
Source
Destination
Source
Destination
Listed registers
Destination
Source
Listed registers
Dn [31:24]
(An + d); Dn [23:16]
Dn [15:8]
(An + d + 4); Dn [7:0]
(An + d)
Dn [31:24]; (An + d + 2)
(An + d + 4)
Dn [15:8]; (An + d + 6)
Immediate Data
Destination
SP – 4
SP; ea
SP
An
SP; (SP)
An, SP + 4
An, SP + d
SP
(An + d + 2);
(An + d + 6)
Dn [23:16];
Dn [7:0]
SP
5- 21

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