Motorola MC68340 User Manual page 334

Integrated processor with dma
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TxCTS—Transmitter Clear-to-Send
1 = Enables clear-to-send operation. The transmitter checks the state of the CTS
input each time it is ready to send a character. If CTS is asserted, the character
is transmitted. If CTS is negated, the channel TxDx remains in the high state,
and the transmission is delayed until CTS is asserted. Changes in CTS while
a character is being transmitted do not affect transmission of that character. If
both TxCTS and TxRTS are enabled, TxCTS controls the operation of the
transmitter.
0 = The CTS has no effect on the transmitter.
SB3–SB0—Stop-Bit Length Control
These bits select the length of the stop bit appended to the transmitted character as
listed in Table 7-10. Stop-bit lengths of nine-sixteenth to two bits, in increments of one-
sixteenth bit, are programmable for character lengths of six, seven, and eight bits. For a
character length of five bits, one and one-sixteenth to two bits are programmable in
increments of one-sixteenth bit. In all cases, the receiver only checks for a high
condition at the center of the first stop-bit position—i.e., one bit time after the last data
bit or after the parity bit, if parity is enabled.
If an external 1 clock is used for the transmitter, MR2 bit 3 = 0 selects one stop bit, and
MR2 bit 3 = 1 selects two stop bits for transmission.
SB3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
MOTOROLA
Freescale Semiconductor, Inc.
Table 7-10. SBx Control Bits
SB2
SB1
SB0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Length 6-8 Bits
Length 5 Bits
0.563
1.063
0.625
1.125
0.688
1.188
0.750
1.250
0.813
1.313
0.875
1.375
0.938
1.438
1.000
1.500
1.563
1.563
1.625
1.625
1.688
1.688
1.750
1.750
1.813
1.813
1.875
1.875
1.938
1.938
2.000
2.000
7- 39

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