Output Port Data Register (Op) - Motorola MC68340 User Manual

Integrated processor with dma
Hide thumbs Also See for MC68340:
Table of Contents

Advertisement

OP0—Output Port 0/ RTSA
1 = The OP0/ RTSA pin functions as the ready-to-send signal for channel A. The
signal is asserted and negated according to the configuration programmed by
RxRTS bit 7 in the MR1A for the receiver and TxRTS bit 5 in the MR2A for the
transmitter.
0 = The OP0/ RTSA pin functions as a dedicated output. The signal reflects the
complement of the value of bit 0 of the OP.
7.4.1.16 OUTPUT PORT DATA REGISTER (OP). The bits in the OP register are set by
performing a bit set command (writing to offset $71E) and are cleared by performing a bit
reset command (writing to offset $71F). This register can only be written when the serial
module is enabled (i.e., the STP bit in the MCR is cleared).
OP bits 7, 5, 3, and 2 are not pinned out on the MC68340;
thus, changing these bits has no effect.
OP6, OP4, OP1, OP0 —Output Port Parallel Outputs
1 = These bits can be set by writing a one to the bit position(s) at this address.
0 = These bits are not affected by writing a zero to this address.
OP bits 7, 5, 3, and 2 are not pinned out on the MC68340;
thus, changing these bits has no effect.
OP6, OP4, OP1, OP0 —Output Port Parallel Outputs
1 = These bits can be cleared by writing a one to the bit position(s) at this address.
0 = These bits are not affected by writing a zero to this address.
MOTOROLA
Freescale Semiconductor, Inc.
Bit Set
OP
7
6
5
4
OP7
OP6
OP5
OP4
RESET:
0
0
0
0
Write Only
NOTE
Bit Reset
OP
7
6
5
4
OP7
OP6
OP5
OP4
RESET:
0
0
0
0
Write Only
NOTE
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
$71E
3
2
1
0
OP3
OP2
OP1
OP0
0
0
0
0
Supervisor/User
$71F
3
2
1
0
OP3
OP2
OP1
OP0
0
0
0
0
Supervisor/User
7- 37

Advertisement

Table of Contents
loading

Table of Contents