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FRZ0—Freeze Bus Monitor Enable
1 = When FREEZE is asserted, the bus monitor is disabled.
0 = When FREEZE is asserted, the bus monitor continues to operate as
programmed.
FIRQ—Full Interrupt Request Mode
1 = Configures port B for seven interrupt request lines, autovector, and no external
chip selects.
0 = Configures port B for four interrupt request lines and four external chip selects.
See Table 4-5 for pin function selection.
SHEN1, SHEN0—Show Cycle Enable
These two control bits determine what the EBI does with the external bus during internal
transfer operations (see Table 4-6). A show cycle allows internal transfers to be
externally monitored. The address, data, and control signals (except for AS) are driven
externally. DS is used to signal address strobe timing for show cycles. Data is valid on
the next falling clock edge after DS is negated. However, data is not driven externally,
and AS and DS are not asserted externally for internal accesses unless show cycles
are enabled.
If external bus arbitration is disabled, the EBI will not recognize an external bus request
until arbitration is enabled again. To prevent bus conflicts, external peripherals must not
attempt to initiate cycles during show cycles with arbitration disabled.
SHEN1
0
0
1
SUPV—Supervisor/User Data Space
The SUPV bit defines the SIM40 registers as either supervisor data space or user
(unrestricted) data space.
1 = The SIM40 registers defined as supervisor/user are restricted to supervisor data
access (FC3–FC0 = $5). An attempted user-space write is ignored and returns
BERR .
0 = The SIM40 registers defined as supervisor/user data are unrestricted (FC2 is a
don't care).
IARB3–IARB0—Interrupt Arbitration Bits 3–0
These bits are used to arbitrate for the bus in the case that two or more modules
simultaneously generate an interrupt at the same priority level. No two modules can
share the same IARB value. The reset value of IARB is $F, allowing the SIM40 to
arbitrate during an IACK cycle immediately after reset. The system software should
initialize the IARB field to a value from $F (highest priority) to $1 (lowest priority). A
4-22
Freescale Semiconductor, Inc.
Table 4-6. SHENx Control Bits
SHEN0
0
Show cycles disabled, external arbitration enabled
1
Show cycles enabled, external arbitration disabled
X
Show cycles enabled, external arbitration enabled
MC68340 USER'S MANUAL
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