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SELECTOR CHANNEL ERROR HANDLING
Interface Control Check
The following conditions can cause an interface con-
trol check:
1. Parity check on 'bus in' during •address-in'
or 'status-in' tag.
2. Address compare not equal during unit selec-
tion.
3. 'Operational in' falling while 'select out' is
still active.
4. 'Select in' received by the channel in response
to 'address out' during a command chain upit selec-
tion or a hardware test I/O selection on a device-end
interrupt.
5. More than one in tag active while 'operational
in' is active.
6. In response to 'address out', during initial
selection on a start I/O or test I/O instruction, if
the channel has not received 'operational in', 'select
in', or 'status in', and the CPU countdown loop has
timed out. The time-out indicator in the common
channel will turn off before the system is stopped or
logged.
7. In response to the halt disconnect sequence
during a halt I/O instruction,
if
'operational in' has
not fallen and the CPU countdown loop has timed out.
The time-out indicator in the common channel will
turn off before the system is stopped or logged.
Mode Switch Settings
Stop Mode: Results in a master check and a log re-
quest (CPU roller 2, position 6).
Channel Stop Mode: Results in a master check and
a log request (CPU roller 2, position 6). All chan-
nel-out tag responses to an in tag· from a control
unit are delayed to allow time to stop the channel
response on the interface. This prevents the in tag
from dropping, thereby freezing the error condition
on the interface to facilitate error analysis.
Process Mode: Results in a logout of only the se-
lector channel
in
error (when the channel is not
masked) and in an I/O interrupt. If the error oc-
curred during an initial selection, logout takes place
and a channel status word (CSW) is stored.
Disable Mode: Results in a selective reset of the
interface and I/O interrupt when the channel is not
masked.
Channel Control Check- -Channel Detected
The following conditions can cause a channel-detected
channel control check:
1. Interface parity check on data going to bus out
lines during address out and command out.
2. Byte counter parity check.
3. Log word 4 error.
4. Zero test portion of log word 5 test in the end
update routine.
Mode Switch Settings
Results are the same as for interface control check
mode switch settings.
Channel Control Check- -CPU Detected
The following conditions can cause a CPU-detected
channel control check:
1.
Time-out check.
2. First-cycle check.
3. ROS parity check.
4. Full-sum check.
5. Mover output or input check.
6. Half-sum check.
7. Storage-protect parity check.
8. Parity test portion of the log word 5 test in the
end update routine.
Mode Switch Settings
Stop or Channel Stop Mode: Results in a log request,
the CPU error displayed on the check register, and
a master check. The channel control check is set
and displayed in the channel, and the channel indicators
remain unchanged.
Process Mode: Results in a logout of the CPU and
the channel in error when PSW bit 13
is
on. This is
followed by a machine check interrupt.
Disable Mode: Results in the error being set into the
check register, but the channel control check is not
sent to the channel.
Program, Storage-Protect, and Chaining Check
The following conditions will cause a program check:
1. Invalid command in the channel command word
(CCW) (positions 4-7 are zero).
2. Invalid flags in the CCW (positions 5-7 of the
flag byte are not zero.
Diagnostic Techniques
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