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Bit 18 Stop: The channel has detected conditions for
terminating an operation on the interface.
Bit
19
IF CDA First Byte: The channel has accepted
the last byte of a read CDA data block.
If
the latch
remains set, the next data byte will be set into all ·
positions of the C register.
Bit 20 CD: Channel is performing a CDA chain oper-
ation, collecting and preparing new control infor-
mation for the handling of the next block of data.
The new control information has not been completely
transfered to the proper channel registers.
Bit
21
BC Mod Enable: A response to the BC mod
request line stating that the interface is at a static
state, 'In' tags are not serviced
in
this period.
Bit
22
Wr Chain Rdy:
Roller 5 Roller 5 Roller 6 Roller 6
Bit 20
Bit 22
Bit 21
Bit 20
CD
Write
Write
Total
Analysis
LA
Chain
Chain
Rec'd
Ready
Procd
Fetch
1
1
0
0
New control information
ready in selector channel,
old record not fully
transmitted.
1
1
0
1
Same as above. Whole new
record totally assembled In
channel registers.
1
1
1
-
New control information
ready, old record fully
transmitted, first word of
new record not yet sent by
CPU.
1
0
1
0
Old record completely
transmitted, new control
Information not ready or the
first byte of previous block
not transmitted on Interface.
1
0
-
1
Channel after prefetchlng
total record and transferring
control to proper registers,
has requested CCWI routine
and Is waiting for DTC.
0
0
I
-
New control transferred to
proper registers, new data
in
C
register, first SVC In
ii not present. CCWl step 1
CL
step
bu
not occurred,
Bit 23 Rec End: The channel is finished with an
operation and wishes to
stote
status in the CSW.
148
(3/71)
Model SO FF.MM
Bit
24 Op
In Test:
'Op
in' line is active in response
to sel out, which remains active through the opera-
tion.
If
'op in' drops while the 'op in test' latch is
active, 'IF ctrl check' will be set.
Bit 25 Channel Stop: Channel has immediately
stopped all operations. The reason for stopping
depends on the check control switch on the CE panel.
1.
Process--Stop and log on detection of:
a. Channel control check
b. Interface control check
2.
Stop:--Stop on detection of:
a. Channel control check
b. Interface control check
c. Data check
d. Any CPU check (freeze channel line)
3.
Channel Stop--Stop on detection of:
a. Channel control check
b, Interface control check
c. Data check
d. Storage protect or program check
e. Chain check
f,
Any CPU check (freeze channel line)
Bit
26
Sel Out: Sel out line is active on the interface
unless blocked by program scan or manual controls.
Bit
27
Stop Routine: Stop latch has been set and the
'in' tag associated with its setting has fallen.
Bit
28
Sel In: Sel in is active on the interface or it is
being simulated by the interface register.
Bit 29
Op
In:
Op
in is active on the interface or it is
being simulated
by
the interface register.
Bits 30-32 IF Out Tags: Conditions have been gene-
rated for activating the out tag, but the actual IF
line may be blocked by program scan, manual
controls or channel stop condition.
Bits 33-35 IF In Tags: Either the in tag is active on
the interface or it is being provided by the lF reg-
ister. •Svc in' can be blocked on read by 'C full
active'
and
on write by 'C full not active.' Status in
can be blocked by the reset of the enable status
latch.
Word 6
Bits 1-7 GP Register: The GP register is set from
the ALCH bus
and
is used to hold various types of
data during a channel operation. Register contents
are:
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