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POS
INH
A CLOCK
CHAN
POLL
U SEL
COMPARE
REG
RD
INSN
IN
IRPT
INSN
BC
UA TO
ADR
!Rf
STOR
A
c
D
Dl
D2
SCAN
USE
POLL
END
INH
RDY
BUS - 0
OUT
t
If CDA
BC
WR
OP
---ouT""
IN
FIRST
MOD
CHAIN
REC
IN
SH
STOP
SEL
OP
STOP
BYTE
CD
ENABL
RDY
END
TEST
OUT
RINE
IN
IN
SVC
ADR
CMND
ADR
STAT
Bit
Indicator
ALD
Position
'°'";,,;00
~
POS REG TRF
GB171
0
Position register tram.fer indicates that a routine was transferred from the request to the position
register but has not yet been serviced.
INH RD STOR
GG131
1
Inhibit read store indicates
thOt
the Channel wlTT inhibit storing Of extra data on on overrun when
chaining.
g
GA101
A
GAlOl
2-5
Displays the A clock latches that control the A clock.
CLOCK
GAlOl
t----·
GA101
{°1
GA161
6
Selector channel Dl special purpose latch is used to set program check if a CCW specifying a TIC
SP
addresses another CCW that also
~eci
fies a TIC.
02
GA161
7
Selector channel D2
~ial~~e
latch is used for r!S_uest
C0"2f_are
routine in a test
llO
~erotion,
INSN SCAN
GFll 1
B
l~truction
scan indicates that the channel is idle and ready to perform on operation.
CHAN IN USE
GF111
9
Channel in use indicates the channel
is~forming
an oeeration.
POLl.
GR121
10
Poll indicates the channel is_EJling the interface due to a reguest in.
POLL IRPT END
GR121
11
Poll interrupt end indicates that every thing needed from the selected unit has been received and the----!
CPU is now to be
interr~ed.
INSN INH
GD131
12
lmtruction inhibit is on when the channel is fetching a CCW (other than initial) and is used to prevent
C1'2.t_ instruction line; from affecl·ing a unit selection.
BC RDY
GF141
13
By!e
counter ready indicates that the new byte counter value has been obtained from a LLW.
ILJA TO
BUS~
0
GV121
14
Unit address to __
~_us
out indicates
~~_en, in~
unit sf!.!_ect
rcutine,~us
out contains
!_~e
unit address.
---1
UNIT SEL ADR OUT
GV121
15
Unit select address out indicates when the address out line is active on the interface during the unit
'coMPARE
select routine.
Ii
GR151
16-17
Compare equal or not equal indicates the compare result between the address sent out on the interface
GR151
and the address received back during unit selectio_n.
STOP
~VJ.:01
J!
2t<:e_ 1nci1cates when
~
interface stc:e_ trigger 1s on.
IF CDA FIRST BYTE
GT161
19
Interface CDA first byte places
the
first byte of the new record into all bytes of
th~
C register if it has
been received before a new value for the byte counter has been obtained fram the CCW.
Cu
Gfi ii
20
The chain duiu
lut~h
ii
u:>ed do .. n'i;;g date. chaining tc differer?t!!:!te bet':-Veen·
a
(CW
r~quirina
n
1_mit
selection and one that does not.
BC MOD ENABL
GR141
2l
Byte counter mod enable indicates when the interface controls permit the channel
to modify the byte--
counter.
WR
CHAlt~
ROY
GF161
22
Write chain ready indicates when a new CCW is completely fetched during data chaining.
REC END
GF111
23
Record end indicates the end of any operation.
OP IN TEST
GRlOl
24
O...P!..'"ational in test indicates if op in falls during the period thOt select out is up.
CHAN
::.lOP
GE121
25
Channel st'?E._ condition. indicates
the
cf'annel is una51e to continue operation.
SEL OUT
GR101
26
Indicates when select out is ~on the interface.
STOP RTNE
GV101
27
St~
routine indicates an interface stop sequence.
SEL IN
GS121
28
Indicates
~n
select in is
~on t~e
interface.
- -
OP IN
GSl21
29
Indicates when operational in is. up on the interface.
SVC OUT
GS131
30
Indicates when service out is
i:e_
on the interface.
ADR OUT
GS131
31
Indicates ,,;r;en address out is up on
~e
interface.
CMND OUT
-
GS131
32
Indicates when command out is
~on
the interface.
SVC IN
GSlll
33
Indicates when service in is
~_p
on the interface.
ADRIN
GS111
34
tndicates when address. in is
ue
on.!!!__ interface.
STAT IN
GSlll
35
Indicates when status in is up on the interface.
FIGURE 149. SELECTOR CHANNEL ROLLER - POSITION 5
Appendix B--System Control Panel
(3/71)
169
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