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The log out switch is active when CPU is in one of
the following states :
Manual
Single cycle
Hard stop
ROS address compare stop
Address Compare Key (IAR)
The address compare (IAR) keylever switch provides
a means of stopping the CPU or generating an oscillo-
scope sync pulse on an instruction address compari-
son. Three switch positions are provided: process,
stop, and sync. When this switch is set to stop or
sync, the test light is on.
Process: No comparison is
performe~.
Stop: An equal comparison between the address keys
and the instruction address register causes the CPU
to enter the stopped state. The stop occurs at com-
pletion of the addressed instruction.
Sync: An equal comparison between the address keys
and the instruction address register causes an oscillo-
scope sync pulse to be generated at the sync control
box. (The sync control box is mounted on the end of
C gate behind the control panel.)
Repeat Instruction Key (IAR)
The repeat instruction (IAR) keyiever switch causes
the instruction at the location specified by the ad-
dress keys to be repeated, under control of the rate
and start switches. The test light is on when this
switch is not in its normal position.
Address Compare Key (ROS)
The address compare (ROS) keylever switch
causes a comparison qf the twelve low-order data
keys (thirteen for extended ROS) and the ROS address.
Two positions are provided; stop and sync. The test
light is on when the switch is not in the sync position.
Stop: The CPU stops on an equal comparison. The
stop occurs at completion of the addressed microin-
struction.
Sync:
An
oscilloscope sync pulse is generated by an
equal comparison. The sync pulse is available at the
sync control box.
152
(3/71)
Model 50 FEMM
Repeat Instruction Key (ROS)
The repeat instruction (ROS) keylever switch causes
the microinstruction
at the location specified by the
twelve (thirteen for extended ROS) low-order data
keys to be repeated continuously. The test light is
on when this switch is on.
Address Compare Key (SAR)
The address compare (SAR) keylever switch provides
a means of stopping the CPU or generating an oscil-
loscope sync pulse on any address other than instruc-
tion addresses used for main storage. Two positions
are provided: stop and sync.
Stop: An equal comparison between :.he SAR compare
keys (data keys 8-31) and the AOB
to SAR causes the
CPU
to enter the stopped-state.
Sync: An equal comparison between the SAR com-
pare keys and the AOB to SAR generates an oscillo-
scope sync pulse as the sync control box.
The above address comparisons are further gated
to distinguish between I/O and CPU addresses by the
SAR compare control keys (data keys 0 and 1). Both
switches off (straight out) deconditions the SAR
compare. The SAR Address Compare switch is in-
effective in FLT modes.
Disable Interval Timer Key
This keylever switch prevents the interval timer
from advancing. The test light is on when this
switch is on.
Lamp Test Key
The lamp test keylever switch permits all indicators
(except marginal voltage, frame thermal, open CB,
and power check) to be tested simultaneously. The
indicator driver is tested as well as the lamp.
Force Indicators Key
A special FLT op register is used to control scan-
out during execution of FLT tests. At such times
the information displayed in the status indicators is
under control of this special op register rather than
the status roller select switches.
The force indicators keylever switch provides a
partial override of the FLT op register. Any in-
dicator that was off will give a valid indication when
the switch is pressed. The force indicators switch
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