Table of Contents
Advertisement
p
8-15
24-31
Indicator
p 8-15
8
9
10
11
12
13
14
15
P16-23
16
17
18
19
20
21
22
23
P24-31
24
25
26
27
28
29
30
31
0
BYTE
1
STATS 2
3
BYTE
O
STORE
~
STATS 3
9
24
10
II
12
5AR
25
26
27
Bit
ALO
Position
RA061
RA003
RA003
RA002
RA002
RA002
RA002
RA001
RAOll
RA061
RA011
RA011
RA011
0-26
RA011
RA021
RA021
RA021
RA021
RA061
RA021
RA031
RA031
RA031
RA031
RA031
RA061
R~J
27
KSOOl
KSOOl
28-31
KSOOl
KSOll
KSO:tl
i<S021
32-35
KS031
KS031
FIGURE 157. CPU 1 ROLLER - POSITION 5
AR
p
13
14
15
16-23
16
17
18
20
21
22
23
BYTE STATS
BYTE STORE STATS
28
29
30
31
Description
The •torage address register is used for addressing mo in and bump storage.
display the parity of the associated byte,
Bit positions 0, 9, and 18
Not used.
Indicates byte stats 0, 1, 2, and 3
Indicates byte store stats 0, I, 2, and 3.
Appendix B--System Control Panel
(3/71)
175
Advertisement
Table of Contents
