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M REGl5TER
p
p
0-7
0
6
8-15
10
11
12
13
14
15
M REGISTER
p
16-23
16
17
18
19
20
21
22
n
24-31
24
25
26
27
28
29
30
31
Bit
Indicator
ALO
Position
Description
p 0- 7
RMOOl
0
RMOOI
1
RMOOl
2
RMOOl
3
RMOOl
4
RMOll
5
RMOll
6
RMOll
7
RMOll
p 8-15
RM021
8
RM021
9
RM021
10
RM021
11
RM021
12
RM031
13
RM031
0-35
Word 3 indicators display the contents of the M register.
The M register is an alternate source
14
RM031
of data for adder Y input and can gate its four bytes to the mover V input. Parity is displayed
15
RM031
in bit positions 0, 9, 18, and 27.
P16-23
RM041
16
RM041
17
RM041
18
RM041
19
RM041
20
RM051
21
RM051
22
RM051
23
RMOSl
P24-31
RM061
24
RM061
25
RM061
26
RM061
27
RM061
28
RM071
29
RM071
30
RM071
31
RM071
FIGURE
155.
CPU
1
ROLLER - POSITION
3
Appendix B--System Control Panel
(3/71)
173
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