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allows certain registers and status information to
be displayed regardless of the FLT op register and
is primarily intended for use during single cycling
of FLT's.
FLT Mode Key
The FLT mode key lever switch is used with the FLT
tests. Two positions are provided: start/load and
force pass.
Start/Load: This position redefines the start and
load switches to provide for initial loading of FLT
programs and starting up after a test termination.
When the load switch is pressed, IPL is notexecuted.
Instead, an FLT load occurs using hardcore controls,
and data enters storage directly, bypassing common
channel hardware.
If
the start switch is pressed
following a stop condition, testing is resumed.
.Force Pass: This position causes bypassing of a
failing FLT when the start switch is pressed following
a stop condition.
FLT Control Select Switch
The FLT control rotary select switch provides five
modes of operation when performing FLT load or
executing tests. The
swilch pusiLium:>
are.
(-)1.'0(;t:Ss,
stop, repeat, auto re-read, and halt after load.
Process: Each FLT is executed 16 times before
branching to the next test.
Stop: The CPU stops after repeating a test 16 times
if
the fail trigger has been set.
Repeat: The FLT being executed is repeated con-
tinuously. The pass/fail indicators are reset every
16 times.
In each of the first three positions (process, stop,
and repeat) a data check during FLT load causes the
CPU to hang up.
The two additional positions of the
switch are provided to control retry; both cause
execution in the process mode once the FLT record
is in main storage.
Auto Re-Read: Backspace and retry occur auto-
matically without the need for manual intervention.
Halt After Load: CPU hangs up at the end of any
FLT load sequence whether it was correct or not.
If
correct, the start switch causes execution.
If
incorrect, the start switch causes a backspace and
then a hang up.
Check Control Select Switch (CPU or Channel Op)
The check control rotary select switch provides four
modes of operation when an error is detected in
either the CPU or channels.
CPU OPERATION:
Process: Unless PSW bit 13 is masked, this position
causes an error log of the entire system followed by
a machine-check interrupt,
If
PSW bit 13 is masked,
the error register will be set but the error will re-
main pending. Error log and machine-check inter-
rupt will occur upon unmasking of bit 13.
Disable: Any errors that occur are set into the error
register but operation continues. No log out or inter-
rupt occurs.
Stop: The first error that occurs stops the system
with the error displayed in the error register.
Chan Stop: The first error that occurs stops the
system with the error displayed in the error register.
CHANNEL OPERATION:
Process:
If
bit 13 is masked, operation proceeds
(as in disable mode) except that system log out due
to error detection takes place when bit 13 is un-
masked. The selector channel stops and is logged
upon detection of a channel control or interface
control check. Two types of logouts may occur; (1)
full log out, which includes the selector channel in
error and CPU registers; or (2) partial log out,
which includes only the selector channel.
Full log out occurs as a result of the following
check conditions:
Parity check of logword 5 test
Parity check detected by CPU
First cycle test
Chain check
Time out check
Partial log out occurs as a result of the following
check conditions:
Interface control checks
Byte counter parity check
Interface bus out parity check on non-data sent
to the unit
Logword 4 test
Zero test
o~
logword 5 test
Any other selector channel errors request an 1/0
Interrupt with the status in the CSW.
Disable: When a check condition is detected, the
channel attempts to terminate the operation and have
status formed in the CSW.
If
an interface control
check exists, an interface reset sequence occurs
immediately.
The time out signal associated with an l/O in-
struction is not sent to the selector channel; the time
out check causes the common channel to initiate
formation of the CSW and reset the selector channel.
Appendix B--System Control Panel
(3/71)
153
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