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4. Set data switches 22 and 30 down.
5. Set ROS REPEAT INSN down.
6. Press ST ART.
7. Restore ROS REPEAT INSN.
8. Set desired data in data and address switches.
9. Set rate switch to PROCESS.
10. Press START.
The following results will occur:
Data keys to the L, R, M, and H registers, andSDR.
Data keys 12-15 to J-reg; 8-11 to MD; and 28-31 to
F-reg.
Address keys to IAR and SAR (to initiate storage
cycle for read out and regenerate) .
Note: For ZCT failures, use this routine to load
all registers.
Recycle Any Maintenance Console PB Operation
l.
Tie C-A4H23 (manual control pulse SS) PKOOl
to A-A4E2D2 ( 60-cycle interval timer KS252).
2. Depress pushbutton to be tested, and hold it
depressed as long as cycling is desired.
Note: The 60-cycle interval timer pulse will fire
the manual control pulse SS, and, as long as any
maintenance console pushbutton is depressed, the
operation will be restarted by the pulse that updates
the timer.
THEORY OF OPERATION
•
System reset, power-on reset, PSW restart,
and IPL use common reset routine.
•
IPL routine loads the initial program and starts
program execution.
•
Stop switch sets stopped state and halt loop.
•
ROS halt loop samples panel switches for display
and store operations.
Power On, Power Off
The power-on switch initiates the power-on se-
quence. The pushbutton is backlighted to indicate
when power is on. The power-off switch initiates
the power-off sequence. For theory of operation
of the power-on and power-off sequences refer to
FE Theory of Operation, System/360 Model 50 Power
Distribution and Control SY22-2829.
System Reset
The Model 50 is initialized with a system reset. A
system reset occurs w.ith the power-on sequence;
the initial program load routine; or from depression
of the system reset or the PSW restart switch. The
general status of the system after a system reset is:
1. CPU is in the stopped state.
2. All pending interruptions are eliminated.
3. Each channel in the system receives a reset.
The channels, in turn, issue a general reset to the
1/0 interfaces. (Off-line control units and 1/0 de-
vices are not reset.)
4. All error indicators are reset. Errors oc-
curring during initialization wil1 show.
5. All local store registers are set to good
parity.
6. The bump area of main storage is set to good
parity. The DA word is set to zero. The other
three words associated with each subchannel are
set to 07000000.
7. The instruction address re_gister is set t.o
zero.
8. The L, M, H, R, J, and MD registers are
set to good parity.
9. The FLT Op register, pass and fail triggers,
ignore error I/O trigger, and progressive scan stat
are reset.
System Reset Operation
The system reset timing sequence is shown on Timing
Chart 203--System Reset Sequence,
#T20~1.
Figure
173 in this manual is a flow diagram of micro-
program system reset.
System reset or power-on reset forces address
242 on QUlOO. IPL routine and PSW restart enter
the common reset routine at block 2B2. At this
point, two parallel operations are started: correct
local store parity, and load bump storage. Local
store data is run through the adder for correct
parity insertion. The DA word of bump storage is
loaded with zeros; the other three words associated
with each subchannel are loaded with 07000000.
Local store is addressed with bits 2 and 3 of the
emit field and bits 24 through 27 of the R register.
The R register must therefore be decremented 16
times to cause a change in bits 2-5 of LSAR. Be-
cause of this, each local store word is parity-cor-
rected a number of times while bump is being loaded.
When byte three of the R register is reduced to all
zeros, the loop operation is finished and a branch
exit results from S3 and MD settings. For system
reset, S3
=
O and MD
=
3 cause a branch to block
204 to restore PSW 0-7 and 12-15. The routine
, then goes to the halt loop on QT200.
Microprogram Reset: The following procedure can
be used to check the reset loop on QUlOO:
1. Set rate switch to PROCESS: enter address
242 in ROS address entry keys.
2. Set the stop on ROS address switch to ON.
Appendix B--System Control Panel
(3/71)
157
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