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8. Remove disk pack No. 2 and mount disk pack
No. 3. Start disk drive motor and wait for the unit
to become ready.
9. Repeat steps 2-8 as described under "MS
Mode Hardcore (Disk)."
10. Press start.
11. ROS bit test records continue to be executed
until the first good stop at location FD5. This word
has bad parity in group 1 and tests the ROS parity
check circuits. The hard stop indicator should be
on.
12. Press the force indicator switch. The cur-
rent ROS address should be FD5. At this stop, set
the check control switch to disable and press start.
13. SDR indicates a successful stop as follows:
p
p
p
p
lFF
OFF
lFF
lFF
The IAR should equal 15'81 (hex).
ROS Mode Hardcore (Disk): For error stops and
loops, refer to the ROS hardcore listing (FLT02).
1. Mount disk pack No. 4 containing ROS hard-
core, zero-cycle, and one-cycle tests on a disk drive
attached to a selector channel, start file motor, and
wait until the unit becomes ready.
2. Select the unit with the load unit rotary
switches.
3. Make sure the check control switch is set to
disable.
4. Set the FLT control switch to halt after load.
5. Press system reset with the FLT mode lever
~witch
in neutral.
6. Place the FLT mode lever switch in the load
position.
7. Press the load pushbutton. IAR should equal
3FFC.
8. Place the FLT control switch in the process
position.
9. Press the start PB. The IAR should equal
490 (hex), and the fail and binary triggers should be
on. The SDR should contain the following:
p
p
p
p
lFF
OFF
lFF
lFF
10. Place the FLT control switch in the process
position.
ROS Mode Cycle Tests (Disk): For stops not identi-
fied in this section, refer to the repair procedures.
1. The ROS mode hardcore tests should have
run successfully.
2. Press the start PB.
58
(3/71)
Model SO FF.MM
3. The zero-cycle tests are loaded into storage
and executed.
4. Completion of the zero-cycle tests automati-
cally calls in the one-cycle tests.
5. Completion of the one-cycle tests results in
a successful stop with the SDR equal to the following:
p
p
p
p
lFF
OFF
lFF
lFF
6. Neutralize all the FLT controls (FLT mode
switch off, FLT control switch on process, and
check control switch on process).
7. Using the storage test switches, write all
ones in storage to restore good parity to storage.
Cycle Test Repair Procedures (Tape/Disk)
~:
The FLT compare and branch microprogram
(QY510) cannot be single-cycled correctly unless the
FLT mode switch is in the neutral (off) position.
If
a great deal of trouble is encountered on a
particular test failure, make a note of it and then
continue on to the following tests to attempt to find
an easier failure to troubleshoot.
The following procedure may be used to locate
problems that cause FLT's to stop before complet-
ing all tests.
1. Check the pass/fail triggers; either fail, or
both pass and fail should be on.
2. Check SDR. Byte zero contains hex 01 (bit 7
is the termination bit). Bits 20-31 contain the hex
value to use when referring to Scopex.
If
bits 16-19
are other than zero, stop is in a one-cycle test. Go
to item 17.
If
bits 16-19 are zero, go to item 4.
3.
If
items 1 and 2 are not true, check IAR.
If
IAR is less than 148 (hex), the first six words of the
record were not executed properly. Refer to the
record format section.
If
IAR is more than 148 (hex),
storage location 84 will contain the mask address
for the current test.
Note: As an aid in finding the error, bypass this
test to see
if
there are multiple errors in the zero-
cycle tests.
If
no multiple errors, turn back to
first error.
4. Get Scopex for the zero-cycle tests.
5. Find the hex value in Scopex that agrees with
SDR 20-31. The column following the test number
indicates what the test was trying to do with the
trigger. R or O equals reset; Sor 1 equals set.
The next column contains the location of the card
that the failing trigger is on. Change the card.
6. Press start.
7. If the card was bad, testing continues.
Otherwise, SDR will contain the same hex value as
in item 5.
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