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4 MEMORY AND BUS
The RAM size used by the application can be configured to equal or less than the implemented size using the
MSCIRAMSZ.IRAMSZ[2:0] bits. For example, this function can be used to prevent creating programs that seek
to access areas outside the RAM area of the target model when developing an application for a model in which the
RAM size is smaller than this IC. After the limitation is applied, accessing an address outside the RAM area results
in the same operation (undefined value is read out) as when a reserved area is accessed.
4.5 Display Data RAM
The embedded display data RAM is used to store display data for the LCD driver. Areas unused for display data in
the display data RAM can be used as a general-purpose RAM. For specific information on the display data RAM,
refer to "Display Data RAM" in the "LCD Driver" chapter.
4.6 Peripheral Circuit Control Registers
The control registers for the peripheral circuits are located in the 8K-byte area beginning with address 0x4000.
Table 4.6.1 shows the control register map. For details of each control register, refer to "List of Peripheral Circuit
Registers" in the appendix or "Control Registers" in each peripheral circuit chapter.
Peripheral circuit
MISC registers (MISC)
Power generator (PWG)
Clock generator (CLG)
Interrupt controller (ITC)
Watchdog timer (WDT)
Real-time clock (RTCA)
Supply voltage detector (SVD)
16-bit timer (T16) Ch.0
4-4
Table 4.6.1 Peripheral Circuit Control Register Map
Address
0x4000 MSCPROT
0x4002 MSCIRAMSZ
0x4004 MSCTTBRL
0x4006 MSCTTBRH
0x4008 MSCPSR
0x4020 PWGVD1CTL
0x4040 CLGSCLK
0x4042 CLGOSC
0x4044 CLGIOSC
0x4046 CLGOSC1
0x404a CLGINTF
0x404c CLGINTE
0x404e CLGFOUT
0x4080 ITCLV0
0x4082 ITCLV1
0x4084 ITCLV2
0x4086 ITCLV3
0x4088 ITCLV4
0x408a ITCLV5
0x408c ITCLV6
0x408e ITCLV7
0x40a0 WDTCLK
0x40a2 WDTCTL
0x40c0 RTCCTL
0x40c2 RTCALM1
0x40c4 RTCALM2
0x40c6 RTCSWCTL
0x40c8 RTCSEC
0x40ca RTCHUR
0x40cc RTCMON
0x40ce RTCYAR
0x40d0 RTCINTF
0x40d2 RTCINTE
0x4100 SVDCLK
0x4102 SVDCTL
0x4104 SVDINTF
0x4106 SVDINTE
0x4160 T16_0CLK
0x4162 T16_0MOD
Seiko Epson Corporation
Register name
MISC System Protect Register
MISC IRAM Size Register
MISC Vector Table Address Low Register
MISC Vector Table Address High Register
MISC PSR Register
PWG V
Regulator Control Register
D1
CLG System Clock Control Register
CLG Oscillation Control Register
CLG IOSC Control Register
CLG OSC1 Control Register
CLG Interrupt Flag Register
CLG Interrupt Enable Register
CLG FOUT Control Register
ITC Interrupt Level Setup Register 0
ITC Interrupt Level Setup Register 1
ITC Interrupt Level Setup Register 2
ITC Interrupt Level Setup Register 3
ITC Interrupt Level Setup Register 4
ITC Interrupt Level Setup Register 5
ITC Interrupt Level Setup Register 6
ITC Interrupt Level Setup Register 7
WDT Clock Control Register
WDT Control Register
RTC Control Register
RTC Second Alarm Register
RTC Hour/Minute Alarm Register
RTC Stopwatch Control Register
RTC Second/1Hz Register
RTC Hour/Minute Register
RTC Month/Day Register
RTC Year/Week Register
RTC Interrupt Flag Register
RTC Interrupt Enable Register
SVD Clock Control Register
SVD Control Register
SVD Status and Interrupt Flag Register
SVD Interrupt Enable Register
T16 Ch.0 Clock Control Register
T16 Ch.0 Mode Register
S1C17M01 TECHNICAL MANUAL
(Rev. 1.2)
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