Data Bridge Transmit Information Setting Register 2 [A - Fujitsu MB86617A Specification Sheet

Ieee1394 serial bus controller for dtv
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LSI S pecification

7.16. Data Bridge Transmit Information Setting Register 2 [A]

Data bridge transmit information setting register 2 [A] is the register that sets CIP header range, transmit channel, and speed added to
transmit packet processed by bridge-Ach.
Bit
Bit
AD
R/W
15
14
36h
R/W
Initial Value
BIT
Bit Name
15 - 10
Tx FMT -A
9
Tx TSF-A
8 - 3
Tx channel-A
2 - 1
Tx speed-A
0
reserved
Rev.1.0
Bit
Bit
Bit
Bit
13
12
11
10
Tx FMT-A
"00" h
Action
Value
Write in FMT range of transmit CIP header.
Read/
(MSB: bit15, LSB: bit10)
-
Write
MPEG2-TS at transmit: "100000" b
DSS at transmit: "100001" b
Read/
-
Write in TSF range of transmits CIP header.
Write
Read/
Write in channel range of transmit Isochronous packet header.
-
Write
(MSB: bit8, LSB: bit 3)
Write in transmit packet speed.
(MSB: bit2, LSB: bit1)
Read/
-
s100 at transmit: "00" b
Write
s200 at transmit: "01" b
s400 at transmit: "10" b
Read
-
Always indicates '0'.
Write
-
Always writes in '0'.
Bit
Bit
Bit
Bit
9
8
7
6
Tx
Tx channel-A
TSF-
A
'0'
"00" h
Function
49
MB86617A
Bit
Bit
Bit
Bit
5
4
3
2
Tx speed-A
"00" b
Fujitsu VLSI
Bit
Bit
1
0
-
'0'

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