Fujitsu MB86617A Specification Sheet page 71

LSI S pecification
BIT Bit Name
10 Rx dlen-err-B
9 Reserved
8 Tx late-B
7 Rx late-B
6 Rx 56 err-B
5 Rx stype err-B
BRG FIFO
4
full-B
BRG FIFO
3
emp-B
2 Rx DBC err-B
Rev.1.0
Action Value
Indicates that data length of receive packet is same as specified data length in
0
format.
Read
Indicates that data length of receive packet differs to the specified data length in the
format.
1
Clears to '0' by lead of this register.
Read - Always indicates '0'.
0 Indicates that transmit packet is transmitted normally.
Read
Indicates that transmit packet became Late packet.
transmit.
1
Clears to '0' by lead of this register.
0 Indicates that received packet is normal.
Read
Indicates that received packet was Late packet.
1 Deletes packet, and does not output to TSP-IC.
Clears to '0' by lead of this register.
0 Indicates that 50/60 range of CIP header of received Isochronous packet is '0'.
Read
Indicates that 50/60 range of CIP header of received Isochronous packet is '1'
1
Clears to '0' by lead of this register.
Indicates that STYPE range of CIP header of received Isochronous packet is
0
'00000' or '00001'.
Read
Indicates that STYPE range of CIP header of received Isochronous packet is other
than '00000' or '00001'.
1
Clears to '0' by lead of this regist er.
0 Indicates that FIFO on LINK I/F side of bridge-Ach is not full.
Read
1 Indicates that FIFO on LINK I/F side of bridge-Ach is full.
0 Indicates that FIFO on LINK I/F side of bridge-Ach is not empty.
Read
1 Indicates that FIFO on LINK I/F side of bridge-Ach is empty.
0 Indicates that DBC range of CIP header of received Isochronous packet is normal.
Read
Indicates that DBC range of CIP header of received Isochronous packet is not
1 consecutive.
Clears to '0' by lead of this register.
Function
66
MB86617A
Delete packet, and not
Fujitsu VLSI