Data Bridge Transmit/Receive Status Register [B - Fujitsu MB86617A Specification Sheet

LSI S pecification

7.29. Data Bridge Transmit/Receive Status Register [B]

Data bridge transmit/receive status register [B] indicates status of packet transmitted/received by bridge-Bch.
Bit Bit
AD R/W
15 14
Tx Rx
50h R
busy- busy-
B B
Initial Value '0' '0'
BIT Bit Name
15 Tx busy-B
14 Rx busy-B
13 Rx 1STP-B
Rx EMI
12
chg-B
11 Rx o/e chg-B
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
Rx Rx Rx
Rx o/e
1STP- EMI dlen
chg-B
B chg-B err-B
'0' '0' '0' '0'
Action Value
Indicates that bridge-Bch is not in the process of transmit.
0 Indicates '0' when Tx end - B (12h-bit14) is set at '1' and transmit process is
stopped.
Read
Indicates that bridge-Bch is in the process of transmit.
1 Indicates '1' when Tx start -B (12h-bit15) is set at '1' and transmit process is
started.
Indicates that bridge-Bch is not in the process of receive.
0 Indicates '0' when Rx end - B (3Ch- bit14) is set at '1' and receive process is
stopped.
Read
Indicates that bridge-Bch is in the process of receive.
1 Indicates '1' when Rx start -B (3Ch- bit15) is set at '1' and receive process is
started.
Indicates that received Isochronous packet after starting receive process is not the
0
first receive packet.
Read
Indicates that the first Isochronous packet is received after starting receive process.
1
Clears to '0' by lead of this register.
Indicates that EMI information of receive Isochronous packet header is not
0
changed.
Read
Indicates that EMI information of receive Isochronous packet header has changed
1 from just former EMI information of packet received by Isochronous-cycle.
Clears to '0' by lead of this register.
Indicat es that odd/even information of receive Isochronous packet header is not
0
changed.
Read
Indicates that odd/even information of receive Isochronous packet header has
changed from just former odd/even information of packet received by
1
Isochronous-cycle.
Clears to '0' by lead of this register.
Bit Bit Bit Bit
9 8 7 6
Tx Rx Rx 56
-
late-B late-B err-B
'0' '0' '0' '0'
Function
65
MB86617A
Bit Bit Bit Bit
5 4 3 2
BRG
Rx BRG Rx
FIFO
stype FIFO DBC
emp-
err-B full-B err-B
B
'0' '0' '1' '0'
Fujitsu VLSI
Bit Bit
1 0
Rx Rx
CIP FMT
err-B err-B
'0' '0'