Fujitsu MB86617A Specification Sheet page 48

LSI S pecification
Register setting value and selection of output port are shown in the table below.
Bit 15 Bit 14
Receive
Status
TV2B TV1B
0 0
0 0
1ch receive
0 1
1 0
1 0
0 1
2ch receive
0 0
0 0
Rev.1.0
Bit 7 Bit 6 Bit 1
CMP
TV2A TV1A
SEL
0 1 0
1 0 0
0 0 0
0 0 0
0 1 0
1 0 0
0 0 0
0 0 1
Bit 0
TSP -IC I/F
Port A
TS
CMP
Processing-Ach
0
Receive data
0 -
Processing-Bch
0
Receive data
0 -
Processing-Ach
0
Receive data
Processing-Bch
0
Receive data
Processing-Ach+Bc
1
h
Receive data
1 -
43
MB86617A
TSP -IC I/F
Port B
-
Processing-Ach
Receive data
-
Processing-Bch
Receive data
Processing-Bch
Receive data
Processing-Ach
Receive data
-
Processing-Ach+Bc
h
Receive data
Fujitsu VLSI