R Eceive I Sochronous P Acket H Eader I Ndicate R Egister 4 [B] - Fujitsu MB86617A Specification Sheet

LSI S pecification
7.26. Receive Isochronous Packet Header Indicate Register 4 [B]
Receive Isochronous packet header indicate register 4 [B] is the register that indicates Isochronous packet CIP header information received
by bridge-Bch.
Bit Bit
AD R/W
15 14
4Ah R - -
Initial value '0' '0'
BIT Bit Name
15 - 12 reserved
11 - 6 Rx FMT -B
5 Rx 56-B
4 - 0 Rx STYPE-B
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
- -
'0' '0'
Action Value
Read - Always indicate '0'.
Indicate FMT range of receive Isochronous packet CIP header.
Read -
(MSB: bit11, LSB: bit6)
Indicates 50/60 range of receive Isochronous packet CIP header when receiving
DV.
Read -
Indicates TSF range of receive Isochronous packet CIP header when receiving
MPEG2-TS or DSS.
Indicate STYPE range of CIP header of receive Isochronous packet.
Read -
(MSB: bit4, LSB: bit0)
Bit Bit Bit Bit
9 8 7 6
Rx FMT -B
"3F"
Function
60
MB86617A
Bit Bit Bit Bit
5 4 3 2
Rx
Rx STYPE-B
56-B
'0' "00 h"
Fujitsu VLSI
Bit Bit
1 0