Mpu Interface - Fujitsu MB86617A Specification Sheet

Ieee1394 serial bus controller for dtv

Table of Contents

LSI S pecification

5.4. MPU Interface

This section explains the pin function of MPU interface.

Signal Name

A7 – 1

D15 - 8,0

AD7 – 1

XCS

XRD(R/W)

XWR(XDS)

ALE

DREQ

XDACK

XINT

Rev.1.0

I/O

Address input pin for selecting internal register

Available only when selecting non-multi mode

When selecting multiplex mode, set this signal in fixed 'L'

Data I/O pin

I/O

Corresponding to address input signal when selecting multiplex mode

Chip enable input pin for this device

80 system mode: read out strobe input pin for this device

68 system mode: input pin for controlling read out/write for this device

80 system mode: strobe input pin for writing into thi s device

68 system mode: input pin of XDS signal to be output with data bus in available

Input pin of ALE signal to be output with its address in available when selecting

multiplex mode

When selecting non-multiplex mode, set this signal in fixed 'L'

Output pin of DMA transfer requiring signal for DMAC

Input pin of DMA allowance signal from DMAC

Output pin for interruption request

Function

MB86617A

Fujitsu VLSI

Table of Contents

Table of Contents