LSI S pecification
9.1. Instruction Code Table
Start sleep
Remove sleep
Asynchronous receive
Remove busy mode
Send PHY packet
Asynchronous Send
Data-FIFO init
DMA Transmit (Asynchronous)
DMA Transmit (PHY packet)
DMA Receive
Rev.1.0
Instruction name
code
01
02
03
04
21
31
Speed code
63
FIFO select code
71
72
73
102
MB86617A
Operand
Fujitsu VLSI