Fujitsu MB86617A Specification Sheet page 47

Ieee1394 serial bus controller for dtv
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LSI S pecification
BIT
Bit Name
8
TS-EN
7
TV2A
6
TV1A
5 - 4
reserved
output DSS
3
size-
2
TCLKSL
1
CMPSEL
0
TSCMP
Note 1) Do not set TV2B (bit15), TV1B (bit14), and DV1B (bit12) to '1' simultaneously.
Note 2) Do not set TV2A (bit7), TV1A (bit6), and DV1A (bit4) to '1' simultaneously.
Note 3) Do not set TV2B (bit15) and TV2A (bit7) to '1' simultaneously.
Note 4) Do not set TV1B (bit14) and TV1A (bit6) to '1' simultaneously.
Note 5) Do not set '1' to TV2B (bit15), TV1B (bit14), TV2A (bit7) and TV1A(bit6) when TSCMP (bit0) is set to '1'.
Note 6) FMT error is reported when receiving data format other than DV-EN (bit10), DSS-EN (bit9) and TS -EN (bit8) regardless of
their settings.
Rev.1.0
Action
Value
Deletes received data and reports FMT error when MPEG2 -TS data is received.
0
ISO packet header and CIP header are indicated in register.
Read/
Write
1
Allows receiving MPEG2 -TS data.
0
Does not output the packet received by bridge-Ach to port B of TSP-IC I/F.
Read/
Write
1
Outputs the packet received by bridge-Ach to port B of TSP -IC I/F.
0
Does not output the packet received by bridge-Ach to port A of TSP-IC I/F.
Read/
Write
1
Outputs the packet received by bridge-Ach to port A of TSP -IC I/F.
Read
-
Always indicates '0'.
Write
-
Always write in '0'.
Outputs DSS packet with DSS packet header received by bridge- Bch to TSP-IC in
0
unit of 140 byte.
Read/
Outputs DSS packet without DSS packet header received by bridge-Ach to TSP -IC
Write
in unit of 130 byte.
1
Removed DSS packet header is stored at receive DSS packet header indicate register
[A].
0
Outputs received data to TSP -IC in synchronization with 6.144 MHz TSCLK.
Read/
Write
1
Outputs received data to TSP -IC in synchronization with 3.072 MHz TSCLK.
0
Outputs to port A when TSCMP (bit0) is '1'.
Read/
Write
1
Outputs to port B when TSCMP (bit0) is '1'.
0
Does not merge packet received by Ach and Bch.
Read/
Write
1
Outputs to one TSP-IC after merging packets received by Ach and Bch.
Function
42
MB86617A
Fujitsu VLSI

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