Fujitsu MB86617A Specification Sheet page 118

LSI S pecification
11.1. Initialization
The example of control flow from the system power on to the packet transmitting/receiving possible state is shown below.
In this examle, the device is not operated with cable power supply before turning on the power of system.
START
Power CPS terminal to 'L', up to 500ns.
Power XRESET terminal to 'L', up to
Read Bus reset detected (INT4)
interrupt.
Read Bus reset complete (INT3)
interrupt.
Rev.1.0
<Host>
400ns.
END
Figure 11.1 Example of flow for Initialization
<Device>
System power ON
Inner reset and release reset.
Start internal PLL.
Receive BUS_RESET
Start bus reset process.
Report Bus reset detected(INT4) interrupt (assert
XINT).
Complete bus reset process.
Report Bus reset complete (INT3)
interrupt (assert XINT).
Packet
transmitting/receiving
possible
113
MB86617A
No
Yes
Fujitsu VLSI