Transmit Offset Setting Register [B - Fujitsu MB86617A Specification Sheet

LSI S pecification

7.10. Transmit Offset Setting Register [B]

Transmit off set setting register [B] is the register that sets offset value added to cycle-time-monitor value Its aim is to generate source
packet header (Time-stamp) added to transmit packet processed by bridge -Bch. (Max. 32 ms)
Time-stamp value is generated on the basis of cycle-time-monitor value at input of first byte of source packet from TSP -IC.
Bit Bit
AD R/W
15 14
18h R/W
1Ah R/W
Initial Value
BIT Bit Name
15 - 4 (high) reserved
3 - 0 (high)
15 - 12 (low)
transmit-offset
-B
11 - 0
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
reserved
Action Value
Read - Always indicate '0'.
Write - Always write in '0'.
Set value to be added to cycle-count range of cycle-time-monitor.
Setting range is 0h to FFh. (unit=125 S).
Read/
-
Write
Set value to be added to cycle-offset range of cycle-time-monitor.
Setting range is 0h to C00h. (unit=1/24.576MHz).
Bit Bit Bit Bit
9 8 7 6
transmit-offset-B (low)
"0000 h"
Function
40
MB86617A
Bit Bit Bit Bit
5 4 3 2
transmit-offset-B (high)
Fujitsu VLSI
Bit Bit
1 0