P Hysical Register #04 ( Read / Write ) - Fujitsu MB86617A Specification Sheet

Ieee1394 serial bus controller for dtv
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LSI S pecification
8.6. Physical register #04 (read/write)
Physical Register#04 is the register that sets the parameter of Self-ID packet to be transmitted by this node.
phy/
Bit
Bit
link-
R/W
15
14
addr
R
08 h
-
-
W
Initial Value
'0'
'0'
< Description of Each Bit
<
BIT
Bit Name
15 - 8
reserved
Link_active
7
Note 1)
Contender
6
Note 2)
5 - 3
Jitter
Pwr_class
2 - 0
Note 3)
Note 1) L bit value of Self-ID packet that is automatically transmitted by this node with the cable supply power ON is always set at '0'
regardless of the setting of this bit.
Note 2) c bit value of Self-ID packet that is automatically transmitted by this node with the cable supply power ON is always set at '0'
regardless of the setting of this bit.
Note 3) pwr field value of Self-ID packet which is automatically transmitted by this node with the cable supply power ON is always set
at the value of PWR3 - 1 terminal regardless of the setting of this bit.
Rev.1.0
Bit
Bit
Bit
Bit
13
12
11
10
-
-
-
-
'0'
'0'
'0'
'0'
Action
Value
Read
-
Always indicate '0'.
Write
-
Always write in '0'.
Read/
Set L bit (Link_active) value of Self-ID packet automatically transmitted by this
-
Write
node with the system power ON.
Read/
Set c bit (CONTENDER) value of Self-ID packet automatically transmitted by this
-
Write
node with the system power ON.
Indicate Jitter value at receive signal repeat.
Read
-
(MSB : 5 , LSB : 3)
Always indicates fixed value "000 b".
Write
-
Always write in '0'.
Read/
Set pwr field (POWER_CLASS) value of Self-ID packet automatically transmitted
-
Write
by this node with the system power ON.
Bit
Bit
Bit
Bit
9
8
7
6
Link_a
Conte
-
-
ctive
nder
'0'
'0'
'1'
'1'
Function
87
MB86617A
Bit
Bit
Bit
Bit
5
4
3
2
Jitter
Pwr_class
-
-
-
'0'
'0'
'0'
'0'
Fujitsu VLSI
Bit
Bit
1
0
'0'
'0'

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