Receive Acknowledge Indicate Register - Fujitsu MB86617A Specification Sheet

LSI S pecification

7.5. Receive Acknowledge Indicate Register

Receive Acknowledge indicate register is the register that indicates received Acknowledge packet addressed to itself.
Read out this register after interrupt report of "Asynchronous packet send".
Bit Bit
AD R/W
15 14
0Ah R - -
Initial Value '0' '0'
BIT Bit Name
15 - 8 reserved
Receive
7 - 4 Acknowledge-co
de
Receive
3 - 0
Acknowledge-par
ity
Note) In case of not receiving Acknowledge within specified time, this register indicates "00h " and reports interrupt of "Acknowledge
missing".
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
- - - -
'0' '0' '0' '0'
Action Value
Read - Always indicate '0'.
Indicate code of received Acknowledge packet addressed to it.
Read -
(MSB: bit7, LSB: bit5)
Indicate parity of received Acknowledge packet addressed to it.
Read -
(MSB: bit3, LSB: bit0)
Bit Bit Bit Bit
9 8 7 6
- - Receive ack-code
'0' '0' "0 h"
Function
33
MB86617A
Bit Bit Bit Bit
5 4 3 2
Receive ack-parity
"0 h"
Fujitsu VLSI
Bit Bit
1 0