Restore - NEC V850E/MS1 UPD703100 User Manual

7.3.2 Restore

To restore from the maskable interrupt processing, the RETI instruction is used.
When the RETI instruction is executed, the CPU performs the following steps, and transfers control to the address
of the restored PC.
(1) Restores the values of the PC and PSW from EIPC and EIPSW because the EP bit of the PSW is 0 and the
NP bit of the PSW is 0.
(2) Transfers control to the address of the restored PC and PSW.
Figure 7-6 illustrates the processing of the RETI instruction.
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Caution When the PSW.EP bit and the PSW.NP bit are changed by the LDSR instruction during
maskable interrupt processing, in order to restore the PC and PSW correctly during recovery
by the RETI instruction, it is necessary to set PSW.EP back to 0 and PSW.NP back to 0 using
the LDSR instruction immediately before the RETI instruction.
Remark The solid line shows the CPU processing flow.
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 7-6. RETI Instruction Processing
RETI instruction
PSW.EP
0
PSW.NP
0
PC EIPC
PSW EIPSW
Restores original processing
User's Manual U12688EJ4V0UM00
1
PC FEPC
PSW FEPSW
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