Control Registers - NEC V850E/MS1 UPD703100 User Manual

8.5.2 Control registers

(1) Power save control register (PSC)
This is an 8-bit register that controls the power save mode.
This is one of the specific registers and is active only when accessed by a specific sequence during a write
operation. For details, refer to 3.4.9 Specific registers.
This register can be read/written in 8- or 1-bit units.
7 6
PSC DCLK1 DCLK0
Bit Position Bit Name
7, 6 DCLK1,
DCLK0
5 TBCS
4 CESEL
Note
2 IDLE
Note
STP
1
Note If the IDLE bit is set at 1 and the STP bit is also set at 1, the system enters the software STOP mode.
CHAPTER 8 CLOCK GENERATOR FUNCTIONS
5 4 3
TBCS CESEL 0
Disable CLKOUT
This specifies the CLKOUT pin's operating mode.
DCLK1 DCLK0
0 0
0 1
1 0
1 1
Time Base Count Select
Selects the time base counter clock.
8
0: f /2
XX
9
1: f /2
XX
Details are shown in 8.6.2 Time base counter (TBC).
Crystal/External Select
Specifies the function of pins X1 and X2.
0: An oscillator is connected to pins X1 and X2.
1: An external clock is connected to pin X1.
If CESEL = 1, the oscillator's feedback loop is cut and current leakage is prevented
when in the software STOP mode. Also, the oscillation stabilization time count by the
time base counter (TBC) after the software STOP mode is released is not carried out.
IDLE Mode
Specifies the IDLE mode.
It enters the IDLE state if 1 is written.
It is automatically reset (0) if the IDLE mode is released.
STOP Mode
Specifies the software STOP mode.
It enters the STOP state if 1 is written.
It is automatically reset (0) if the software STOP mode is released.
User's Manual U12688EJ4V0UM00
2 1 0
IDLE STP 0
Function
Mode
Normal output mode
RFU (reserved)
RFU (reserved)
Clock output inhibit mode
Address After reset
FFFFF070H 00H
237