Flyby Transfer - NEC V850E/MS1 UPD703100 User Manual

32-/16-bit single-chip microcontrollers
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6.6.2 Flyby transfer

The V850E/MS1 supports flyby transfer between external memory and external I/O, and internal RAM and internal
peripheral I/O.
(1) Flyby transfer between external memory and external I/O
This data transfer between memory and I/O is performed in one cycle. To achieve single-cycle transfer, the
memory address is always output irrespective of whether it is that of the source or the destination, and the
read/write strobe signals for the memory and I/O are made active at the same time.
The external I/O is selected with the DMAAK0 to DMAAK3 signal.
Figure 6-8 shows examples of flyby DMA transfer for an external device.
Figure 6-8. Timing of Flyby Transfer (DRAM → → → → External I/O) (1/3)
CPU states
TI
DMAC states
CLKOUT
DMARQn
Internal DMA
request signal
DMAAKn
TCn
A0 to A23
D0 to D15
CSm/RASm
BCYST
RD
OE
WE
UWR/UCAS
LWR/LCAS
IORD
IOWR
WAIT
Remarks 1. The circles indicate the sampling timing.
2. Broken lines indicate high impedance.
3. n = 0 to 3
m = 0 to 7
CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
(a) Block transfer mode
T1
TI
TI
T0
T1FH
TI
Row
address
User's Manual U12688EJ4V0UM00
T2
T3
TO1
TW
TO2
T2FH
T2FH
T1FH
T1FHI
T1FHI
Column address
Column address
Data
Data
TE
TI
185

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