NEC V850E/MS1 UPD703100 User Manual page 62

32-/16-bit single-chip microcontrollers
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(16) PX5 to PX7 (Port X) ··· 3-state I/O
Port X is an 8-bit input/output port that can be set to input or output in 1-bit units.
Besides functioning as a port, in the control mode it operates as a refresh request signal output for DRAM,
wait insertion signal input and system clock output.
The operation mode can be set as port or control in 1-bit units, specified by the port X mode control register
(PMCX).
(a) Port mode
PX5 to PX7 can be set to input or output in bit units by the port X mode register (PMX).
(b) Control mode
PX5 to PX7 can be set in the port/control mode in bit units by the PMCX register.
(i)
REFRQ (Refresh Request) ··· 3-state output
This is the refresh request signal for DRAM.
In cases where the address is decoded by an external circuit and the connected DRAM is increased,
or in cases where external SIMMs are connected, this signal is used for RAS control during the
refresh cycle.
This signal becomes active during the refresh cycle. Also, during bus hold, it becomes active when a
refresh request is generated and informs the external bus master that a refresh request was
generated.
(ii) WAIT (Wait) ··· input
This is the control signal input pin that inserts a data wait in the bus cycle, and it can be input
asynchronously with respect to the CLKOUT signal. When the CLKOUT signal falls, sampling is
executed. When the set/hold time is not terminated within the sampling timing, the wait insertion may
not be executed.
(iii) CLKOUT (Clock Output) ··· output
This is the internal system clock output pin. When in single-chip mode 1 and ROM-less modes 0 and
1, output from the CLKOUT pin can be executed even during reset.
When in single-chip mode 0, it changes to the port mode during reset, so output from the CLKOUT
pin cannot be executed. Set the port X mode control register (PMCX) to control mode to execute
CLKOUT output.
(17) CKSEL (Clock Generator Operating Mode Select) ··· input
This is the input pin that specifies the clock generator's operation mode.
Make sure the input level does not change during operation.
62
CHAPTER 2 PIN FUNCTIONS
User's Manual U12688EJ4V0UM00

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