Self-Refresh Functions - NEC V850E/MS1 UPD703100 User Manual

5.3.9 Self-refresh functions

In the case of IDLE mode and software STOP mode, the DRAM controller generates a CBR self-refresh cycle.
However, the RASn pulse width of DRAM should meet the specifications to enter a self-refresh operation mode (n
= 0 to 7).
To release the self-refresh cycle, follow either of two methods below.
(1) Release by NMI input
(a) In the case of self-refresh cycle with IDLE mode
Set the RASn, LCAS, UCAS signals to inactive (high level) immediately to release the self-refresh cycle.
(b) In the case of self-refresh cycle with software STOP mode
Set the RASn, LCAS, UCAS signals to inactive (high level) after stabilizing oscillation to release the self-
refresh cycle.
(2) Release by RESET input
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CHAPTER 5 MEMORY ACCESS CONTROL FUNCTION
User's Manual U12688EJ4V0UM00