NEC V850E/MS1 UPD703100 User Manual page 45

32-/16-bit single-chip microcontrollers
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(2) Non-port pins (3/4)
Pin Name
I/O
WE
Output
OE
Output
LCAS
Output
UCAS
Output
RAS0 to RAS3
Output
RAS4
RAS5
RAS6
RAS7
BCYST
Output
CS0 to CS3
Output
CS4
CS5
CS6
CS7
WAIT
Input
REFRQ
Output
IOWR
Output
IORD
Output
DMARQ0 to
Input
DMARQ3
DMAAK0 to
Output
DMAAK3
TC0 to TC3
Output
HLDAK
Output
HLDRQ
Input
ANI0 to ANI7
Input
NMI
Input
CLKOUT
Output
CKSEL
Input
MODE0 to
Input
MODE2
MODE3
Note µ PD70F3102 and 70F3102A only
CHAPTER 2 PIN FUNCTIONS
Function
Write enable signal output for DRAM
Output enable signal output for DRAM
Column address strobe signal output for DRAM lower data
Column address strobe signal output for DRAM higher data
Row address strobe signal output for DRAM
Strobe signal output that shows the start of the bus cycle
Chip select signal output
Control signal input that inserts a wait in the bus cycle
Refresh request signal output for DRAM
DMA write strobe signal output
DMA read strobe signal output
DMA request signal input
DMA acknowledge signal output
DMA termination (terminal count) signal output
Bus hold acknowledge output
Bus hold request input
Analog inputs to the A/D converter
Non-maskable interrupt request input
System clock output
Input which specifies the clock generator's operating mode
Operation mode specification
User's Manual U12688EJ4V0UM00
Alternate Function
P93
P95
P90/LWR
P91/UWR
P80/CS0 to P83/CS3
P84/CS4/IOWR
P85/CS5/IORD
P86/CS6
P87/CS7
P94
P80/RAS0 to
P83/RAS3
P84/RAS4/IOWR
P85/RAS5/IORD
P86/RAS6
P87/RAS7
PX6
PX5
P84/RAS4/CS4
P85/RAS5/CS5
P04/INTP100 to
P07/INTP103
P14/INTP110 to
P17/INTP113
P104/INTP120 to
P107/INTP123
P96
P97
P70 to P77
P20
PX7
Note
V
PP
45

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