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(5) Successive approximation register (SAR)
The SAR is a 10-bit register in which is set series resistor string voltage tap data, which have values that
match analog input voltage values, 1 bit at a time beginning with the most significant bit (MSB).
If the data is set in the SAR all the way to the least significant bit (LSB) (A/D conversion completed), the
contents of that SAR (conversion results) are held in the A/D conversion results register (ADCRn).
(6) A/D conversion results register (ADCRn)
The ADCR is a 10-bit register that holds A/D conversion results. Each time A/D conversion is completed,
conversion results are loaded from the successive approximation register (SAR).
RESET input makes its contents undefined.
(7) Controller
Selects the analog input, generates the sample and hold circuit operation timing, and controls the conversion
trigger according to the mode set to the ADM0 and ADM1 registers.
(8) ANI0 to ANI7 pins
8-channel analog input pin for the A/D converter. Inputs the analog signal to be A/D converted.
Caution Make sure that the voltages input to ANI0 through ANI7 do not exceed the rated values. If a
voltage higher than V
ratings) is input to a channel, the conversion value of the channel is undefined, and the
conversion values of the other channels may also be affected.
(9) AV
pin
REF
Pin for inputting the reference voltage of the A/D converter. Converts signals input to the ANIn pin to digital
signals based on the voltage applied between AV
316
CHAPTER 11 A/D CONVERTER
or lower than V
(even within the range of the absolute maximum
DD
SS
and AV
REF
SS
User's Manual U12688EJ4V0UM00
.
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