NEC V850E/MS1 UPD703100 User Manual page 239

32-/16-bit single-chip microcontrollers
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(2) Releasing HALT mode
The HALT mode can be released by NMI pin input, an unmasked maskable interrupt request, or a RESET
signal input.
(a) Release by NMI pin input, maskable interrupt request
The HALT mode is unconditionally released by NMI pin input or an unmasked maskable interrupt request
regardless of the priority. However, if the HALT mode is set in an interrupt processing routine, the
operation will differ as follows:
(i)
If an interrupt request with a priority lower than that of the interrupt request under execution is
generated, the HALT mode is released, but the newly generated interrupt request is not
acknowledged. The new interrupt request will be kept pending.
(ii) If an interrupt request with a priority higher (including NMI request) than the interrupt request under
execution is generated, the HALT mode is released, and the interrupt request is also acknowledged.
Table 8-3. Operations after HALT Mode Is Released by Interrupt Request
Releasing Source
NMI request
Maskable interrupt
request
(b) Release by RESET pin input
This operation is the same as a normal reset operation.
CHAPTER 8 CLOCK GENERATOR FUNCTIONS
Interrupt Enable (EI) State
Branch to handler address
Branch to the handler address or
execute the next instruction.
User's Manual U12688EJ4V0UM00
Interrupt Disable (DI) State
Execute the next instruction.
239

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