Flash Securable Area Bank2 Register (Flash_Sec2R) - ST STM32G4 Series Reference Manual

Embedded Flash memory (FLASH) for category 3 devices
Bits 31:17 Reserved, must be kept cleared
3.7.18

Flash Securable area bank2 register (FLASH_SEC2R)

Address offset: 0x74
Reset value: 0xFFFF FFXX
Access: no wait state when no Flash memory operation is on going, word, half-word and
byte access.
31 30 29
Res. Res. Res.
15 14 13
Res. Res. Res.
144/2126
Bit 16 BOOT_LOCK used to force boot from user Flash area
0: Boot based on the pad/option bit configuration
1: Boot forced from Main Flash memory
Caution: If BOOT_LOCK is set in association with RDP Level 1, the debug
capabilities of the device are stopped and the reset value of the
DBG_SWEN bit of the FLASH_ACR register becomes zero. If the
DBG_SWEN bit is not set by the application code after reset, there is
no way to recover from this situation.
Bits 15:8 Reserved, must be kept cleared
Bit 7:0 SEC_SIZE1: sets the number of pages used in the bank 1 Securable memory
area.
Securable area starts at @ 0x0800 0000 and its size is SEC_SIZE1 * page size.
This field can be changed in level0 only.
Any attempt to modify in level1 silently fails, and does not change register value.
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
Res. Res. Res. Res.
Bits 31:8 Reserved, must be kept cleared
Bit 7:0 SEC_SIZE2: sets the number of pages used in the bank 2 Securable memory
area.
Securable area starts at @ 0x0804 0000 and its size is SEC_SIZE2 * page size.
When DBANK=0, this field is not usefull.
This field can be changed in level0 only. Any attempt to modify in level1 silently
fails, and does change register value.
24 23 22
Res. Res. Res.
8 7 6
Res.
rw rw
RM0440 Rev 4
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
SEC_SIZE2
rw rw rw rw
RM0440
17 16
Res. Res.
1 0
rw rw